Now that every MediaTek SoC describes its clock gates through struct mtk_clk_tree and handles them with the generic topckgen ops, nothing uses the dedicated clock gate code path anymore.
Remove struct mtk_cg_priv, the mtk_clk_gate_ops (of_xlate/enable/disable/ get_rate/dump) and mtk_common_clk_gate_init() from clk-mtk. Clock gate controllers are now just regular mtk_clk_tree providers. No functional change intended. Signed-off-by: Julien Stephan <[email protected]> --- drivers/clk/mediatek/clk-mtk.c | 113 ----------------------------------------- drivers/clk/mediatek/clk-mtk.h | 13 ----- 2 files changed, 126 deletions(-) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 61d718f162d..a5e983c44ac 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -1039,90 +1039,6 @@ static void mtk_infrasys_dump(struct udevice *dev) } #endif -/* CG functions */ - -static const int mtk_clk_gate_of_xlate(struct clk *clk, - struct ofnode_phandle_args *args) -{ - struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_clk_tree *tree = priv->tree; - int ret; - - ret = mtk_common_clk_of_xlate(clk, args, tree); - if (ret) - return ret; - - if (clk->id >= priv->gates_offs && - clk->id < priv->gates_offs + priv->num_gates) - return 0; - - return -ENOENT; -} - -static int mtk_clk_gate_enable(struct clk *clk) -{ - struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate; - - if (clk->id < priv->gates_offs) - return -EINVAL; - - gate = &priv->gates[clk->id - priv->gates_offs]; - return mtk_gate_enable(priv->base, gate); -} - -static int mtk_clk_gate_disable(struct clk *clk) -{ - struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate; - - if (clk->id < priv->gates_offs) - return -EINVAL; - - gate = &priv->gates[clk->id - priv->gates_offs]; - return mtk_gate_disable(priv->base, gate); -} - -static ulong mtk_clk_gate_get_rate(struct clk *clk) -{ - struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate; - struct udevice *pdev; - - if (clk->id < priv->gates_offs) - return -EINVAL; - - gate = &priv->gates[clk->id - priv->gates_offs]; - - if (gate->flags & CLK_PARENT_EXT) - return mtk_ext_clock_get_rate(priv->tree, gate->parent); - - pdev = mtk_clk_parent_get_provider(gate->flags); - if (IS_ERR(pdev)) - return -ENOENT; - - return mtk_clk_find_parent_rate(clk, gate->parent, pdev); -} - -#if CONFIG_IS_ENABLED(CMD_CLK) -static void mtk_clk_gate_dump(struct udevice *dev) -{ - struct mtk_cg_priv *priv = dev_get_priv(dev); - const struct mtk_clk_tree *tree = priv->tree; - u32 i; - - for (i = 0; i < priv->num_gates; i++) { - const struct mtk_gate *gate = &priv->gates[i]; - - printf("[GATE%u] DT: %u", i, gate->id); - mtk_clk_print_mapped_id(gate->id, i + priv->gates_offs, tree->id_offs_map); - mtk_clk_print_rate(dev, i + priv->gates_offs); - mtk_clk_print_single_parent(gate->parent, gate->flags); - printf("\n"); - } -} -#endif - const struct clk_ops mtk_clk_apmixedsys_ops = { .of_xlate = mtk_apmixedsys_of_xlate, .enable = mtk_apmixedsys_enable, @@ -1166,16 +1082,6 @@ const struct clk_ops mtk_clk_infrasys_ops = { #endif }; -const struct clk_ops mtk_clk_gate_ops = { - .of_xlate = mtk_clk_gate_of_xlate, - .enable = mtk_clk_gate_enable, - .disable = mtk_clk_gate_disable, - .get_rate = mtk_clk_gate_get_rate, -#if CONFIG_IS_ENABLED(CMD_CLK) - .dump = mtk_clk_gate_dump, -#endif -}; - int mtk_common_clk_parent_bind(struct udevice *dev) { /* @@ -1199,22 +1105,3 @@ int mtk_common_clk_init(struct udevice *dev, const struct mtk_clk_tree *tree) return mtk_clk_tree_register_provider(dev, tree); } - -int mtk_common_clk_gate_init(struct udevice *dev, - const struct mtk_clk_tree *tree, - const struct mtk_gate *gates, int num_gates, - int gates_offs) -{ - struct mtk_cg_priv *priv = dev_get_priv(dev); - - priv->base = dev_read_addr_ptr(dev); - if (!priv->base) - return -ENOENT; - - priv->tree = tree; - priv->gates = gates; - priv->num_gates = num_gates; - priv->gates_offs = gates_offs; - - return 0; -} diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index 437797dd0df..a6251547ecc 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -284,26 +284,13 @@ struct mtk_clk_priv { const struct mtk_clk_tree *tree; }; -struct mtk_cg_priv { - void __iomem *base; - const struct mtk_clk_tree *tree; - const struct mtk_gate *gates; - int num_gates; - int gates_offs; -}; - extern const struct clk_ops mtk_clk_apmixedsys_ops; extern const struct clk_ops mtk_clk_fixed_pll_ops; extern const struct clk_ops mtk_clk_topckgen_ops; extern const struct clk_ops mtk_clk_infrasys_ops; -extern const struct clk_ops mtk_clk_gate_ops; int mtk_common_clk_parent_bind(struct udevice *dev); int mtk_common_clk_init(struct udevice *dev, const struct mtk_clk_tree *tree); -int mtk_common_clk_gate_init(struct udevice *dev, - const struct mtk_clk_tree *tree, - const struct mtk_gate *gates, int num_gates, - int gates_offs); #endif /* __DRV_CLK_MTK_H */ -- 2.54.0
