MT8512 declares a separate U_BOOT_DRIVER, probe() function and compatible table for the topckgen and infracfg clock gate controllers, despite both sharing the same implementation.
Describe the gates directly in each controller's struct mtk_clk_tree, reference the trees from the driver data and use the generic mtk_clk_topckgen_ops. Both controllers share the same DM flags and (absent) bind() callback and are merged into a single U_BOOT_DRIVER. This also stops using mtk_common_clk_gate_init() and struct mtk_cg_priv, which are scheduled for removal. No functional change intended. Signed-off-by: Julien Stephan <[email protected]> --- drivers/clk/mediatek/clk-mt8512.c | 60 ++++++++++++++++++--------------------- 1 file changed, 28 insertions(+), 32 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8512.c b/drivers/clk/mediatek/clk-mt8512.c index 88c55e5ac6c..5e61f80d37e 100644 --- a/drivers/clk/mediatek/clk-mt8512.c +++ b/drivers/clk/mediatek/clk-mt8512.c @@ -815,9 +815,18 @@ static const struct mtk_clk_tree mt8512_topckgen_clk_tree = { .type = MTK_CLK_TREE_TOPCKGEN, }; -static const struct mtk_clk_tree mt8512_clk_tree = { +static const struct mtk_clk_tree mt8512_topckgen_cg_tree = { .ext_clk_rates = ext_clock_rates, .num_ext_clks = ARRAY_SIZE(ext_clock_rates), + .gates = top_clks, + .num_gates = ARRAY_SIZE(top_clks), +}; + +static const struct mtk_clk_tree mt8512_infracfg_tree = { + .ext_clk_rates = ext_clock_rates, + .num_ext_clks = ARRAY_SIZE(ext_clock_rates), + .gates = infra_clks, + .num_gates = ARRAY_SIZE(infra_clks), }; static int mt8512_apmixedsys_probe(struct udevice *dev) @@ -830,16 +839,11 @@ static int mt8512_topckgen_probe(struct udevice *dev) return mtk_common_clk_init(dev, &mt8512_topckgen_clk_tree); } -static int mt8512_topckgen_cg_probe(struct udevice *dev) +static int mt8512_clk_probe(struct udevice *dev) { - return mtk_common_clk_gate_init(dev, &mt8512_clk_tree, top_clks, - ARRAY_SIZE(top_clks), 0); -} + const struct mtk_clk_tree *tree = (void *)dev_get_driver_data(dev); -static int mt8512_infracfg_probe(struct udevice *dev) -{ - return mtk_common_clk_gate_init(dev, &mt8512_clk_tree, infra_clks, - ARRAY_SIZE(infra_clks), 0); + return mtk_common_clk_init(dev, tree); } static const struct udevice_id mt8512_apmixed_compat[] = { @@ -852,13 +856,15 @@ static const struct udevice_id mt8512_topckgen_compat[] = { { } }; -static const struct udevice_id mt8512_topckgen_cg_compat[] = { - { .compatible = "mediatek,mt8512-topckgen-cg", }, - { } -}; - -static const struct udevice_id mt8512_infracfg_compat[] = { - { .compatible = "mediatek,mt8512-infracfg", }, +static const struct udevice_id of_match_mt8512_clk_gate[] = { + { + .compatible = "mediatek,mt8512-topckgen-cg", + .data = (ulong)&mt8512_topckgen_cg_tree + }, + { + .compatible = "mediatek,mt8512-infracfg", + .data = (ulong)&mt8512_infracfg_tree + }, { } }; @@ -884,22 +890,12 @@ U_BOOT_DRIVER(mt8512_clk_topckgen) = { .flags = DM_FLAG_PRE_RELOC, }; -U_BOOT_DRIVER(mt8512_clk_topckgen_cg) = { - .name = "mt8512-topckgen-cg", +U_BOOT_DRIVER(mt8512_clk_gate) = { + .name = "mt8512-clk-gate", .id = UCLASS_CLK, - .of_match = mt8512_topckgen_cg_compat, - .probe = mt8512_topckgen_cg_probe, - .priv_auto = sizeof(struct mtk_cg_priv), - .ops = &mtk_clk_gate_ops, - .flags = DM_FLAG_PRE_RELOC, -}; - -U_BOOT_DRIVER(mt8512_clk_infracfg) = { - .name = "mt8512-infracfg", - .id = UCLASS_CLK, - .of_match = mt8512_infracfg_compat, - .probe = mt8512_infracfg_probe, - .priv_auto = sizeof(struct mtk_cg_priv), - .ops = &mtk_clk_gate_ops, + .of_match = of_match_mt8512_clk_gate, + .probe = mt8512_clk_probe, + .priv_auto = sizeof(struct mtk_clk_priv), + .ops = &mtk_clk_topckgen_ops, .flags = DM_FLAG_PRE_RELOC, }; -- 2.54.0
