Add clock tree type flags to the mt8516 clock tree structures. These will be used later for parent lookup.
Clock trees had to be split now that each tree has a different type flag. Signed-off-by: David Lechner <[email protected]> --- drivers/clk/mediatek/clk-mt8516.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c index 1070dd1551b..3824885682b 100644 --- a/drivers/clk/mediatek/clk-mt8516.c +++ b/drivers/clk/mediatek/clk-mt8516.c @@ -744,30 +744,42 @@ static const struct mtk_gate top_clks[] = { GATE_TOP5(CLK_TOP_APLL12_DIV6, CLK_TOP_APLL12_CK_DIV6, 8), }; -static const struct mtk_clk_tree mt8516_clk_tree = { +static const struct mtk_clk_tree mt8516_apmixed_clk_tree = { .pll_parent = EXT_PARENT(CLK_PAD_CLK26M), + .ext_clk_rates = ext_clock_rates, + .num_ext_clks = ARRAY_SIZE(ext_clock_rates), + .plls = apmixed_plls, + .num_plls = ARRAY_SIZE(apmixed_plls), + .type = MTK_CLK_TREE_APMIXED, +}; + +static const struct mtk_clk_tree mt8516_topckgen_clk_tree = { .ext_clk_rates = ext_clock_rates, .num_ext_clks = ARRAY_SIZE(ext_clock_rates), .fdivs_offs = CLK_TOP_DMPLL, .muxes_offs = CLK_TOP_UART0_SEL, - .plls = apmixed_plls, .fclks = top_fixed_clks, .fdivs = top_fixed_divs, .muxes = top_muxes, - .num_plls = ARRAY_SIZE(apmixed_plls), .num_fclks = ARRAY_SIZE(top_fixed_clks), .num_fdivs = ARRAY_SIZE(top_fixed_divs), .num_muxes = ARRAY_SIZE(top_muxes), + .type = MTK_CLK_TREE_TOPCKGEN, +}; + +static const struct mtk_clk_tree mt8516_clk_tree = { + .ext_clk_rates = ext_clock_rates, + .num_ext_clks = ARRAY_SIZE(ext_clock_rates), }; static int mt8516_apmixedsys_probe(struct udevice *dev) { - return mtk_common_clk_init(dev, &mt8516_clk_tree); + return mtk_common_clk_init(dev, &mt8516_apmixed_clk_tree); } static int mt8516_topckgen_probe(struct udevice *dev) { - return mtk_common_clk_init(dev, &mt8516_clk_tree); + return mtk_common_clk_init(dev, &mt8516_topckgen_clk_tree); } static int mt8516_topckgen_cg_probe(struct udevice *dev) @@ -795,6 +807,7 @@ U_BOOT_DRIVER(mtk_clk_apmixedsys) = { .name = "mt8516-apmixedsys", .id = UCLASS_CLK, .of_match = mt8516_apmixed_compat, + .bind = mtk_common_clk_parent_bind, .probe = mt8516_apmixedsys_probe, .priv_auto = sizeof(struct mtk_clk_priv), .ops = &mtk_clk_apmixedsys_ops, @@ -805,6 +818,7 @@ U_BOOT_DRIVER(mtk_clk_topckgen) = { .name = "mt8516-topckgen", .id = UCLASS_CLK, .of_match = mt8516_topckgen_compat, + .bind = mtk_common_clk_parent_bind, .probe = mt8516_topckgen_probe, .priv_auto = sizeof(struct mtk_clk_priv), .ops = &mtk_clk_topckgen_ops, -- 2.43.0
