Adds NAND libarary to SPL.
Signed-off-by: Simon Schwarz <simonschwarz...@gmail.com>
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
V3 changes:
DEL cosmetic (empty line)
V4 changes:
nothing
V5 changes:
CHG nand_ecc.o is only compiled for SPL if CONFIG_OMAP34XX is set
V6 changes:
ADD nand_spl.c - git add, finally
DEL nand_ecc barrier ifdef for OMAP3
V7 changes:
CHG nand_read_buf and nand_read_buf16 - removed static modifier
ADD nand_base.c to SPL
DEL omap_spl_read_buf16 and omap_spl_read_buf from omap_gpmc - now use the
functions of nand_base.de
ADD nand_read_buf and nand_read_buf16 to nand.h
CHG commit message to reflect that also POWER library is added
CHG renamed nand_spl.c to nand_spl_simple.c
CHG removed mtd from all interfaces of the nand_spl_simple
CHG nand_load image is now nand_spl_load_image
CHG removed comment on the transition from nand_boot to nand_spl_simple
CHG all offset parameters are now of type loff_t
CHG moved power library adding to an own patch
V8 changes:
CHG: Added CONFIG_SPL_NAND_SIMPLE
DEL nand_spl_read_page is replaced by nand_spl_load_image with size=page size
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
---
doc/README.SPL | 1 +
drivers/mtd/nand/Makefile | 10 ++++++++--
drivers/mtd/nand/nand_base.c | 4 ++--
drivers/mtd/nand/omap_gpmc.c | 27 +++++++++++++++++++++++++++
include/nand.h | 5 ++++-
spl/Makefile | 1 +
6 files changed, 43 insertions(+), 5 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..ef946ce 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,4 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..b6a7886 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,18 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_NAND_SIMPLE
+COBJS-y += nand_spl_simple.o
+endif
+else
COBJS-y += nand.o
-COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
+COBJS-y += nand_base.o
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 1a95a91..e7dfcb1 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -213,7 +213,7 @@ static void nand_write_buf(struct mtd_info *mtd, const
uint8_t *buf, int len)
*
* Default read function for 8bit buswith
*/
-static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
@@ -269,7 +269,7 @@ static void nand_write_buf16(struct mtd_info *mtd, const
uint8_t *buf, int len)
*
* Default read function for 16bit buswith
*/
-static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..5bbec48 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,14 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd,
int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +232,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t
mode)
}
}
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +289,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +348,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = nand_read_buf16;
+ else
+ nand->read_buf = nand_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/include/nand.h b/include/nand.h
index 3c5ef4e..b4140794 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,9 +132,12 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
-void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst);
void nand_deselect(void);
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..17d4f7f 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,7 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) +=
drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
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