From: Dinesh Maniyam <[email protected]> The full Linux/MTD bad-block-table (BBT) scanner lives in drivers/mtd/nand/raw/nand_bbt.c, which is *not* linked into the U-Boot SPL build. In SPL, nand_base.c still calls the chip->scan_bbt hook from nand_block_checkbad(), so each driver must either provide its own scan_bbt stub or set NAND_SKIP_BBTSCAN so the hook is never invoked. The Denali driver currently does neither.
For SPL the cheapest and most appropriate option is to simply skip the BBT scan: SPL only loads a single FIT image from a known offset, nand_block_checkbad() falls through to chip->block_bad() (an on-demand single-page OOB read), and we save both code size and boot time. Add NAND_DENALI_SKIP_BBTSCAN_SPL (depends on NAND_DENALI && SPL) and honour it in denali_init() under CONFIG_XPL_BUILD by ORing NAND_SKIP_BBTSCAN into chip->options. Have ARCH_SOCFPGA imply the new symbol so all Altera/Intel SoCFPGA boards using the Denali controller get the safe SPL default automatically without per-defconfig churn; other Denali users (e.g. UniPhier) keep their existing behaviour. Signed-off-by: Dinesh Maniyam <[email protected]> --- arch/arm/Kconfig | 1 + drivers/mtd/nand/raw/Kconfig | 11 +++++++++++ drivers/mtd/nand/raw/denali.c | 4 ++++ 3 files changed, 16 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f624675eadf..db8d4a121b0 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1195,6 +1195,7 @@ config ARCH_SOCFPGA imply DM_SPI_FLASH imply FAT_WRITE imply MTD + imply NAND_DENALI_SKIP_BBTSCAN_SPL imply SPL imply SPL_DM imply SPL_DM_SPI diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 69a254f6650..261b9a51dd7 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -223,6 +223,17 @@ config NAND_DENALI_DT Enable the driver for NAND flash on platforms using a Denali NAND controller as a DT device. +config NAND_DENALI_SKIP_BBTSCAN_SPL + bool "Skip the bad-block-table scan in SPL with the Denali NAND driver" + depends on NAND_DENALI && SPL + help + Skip the full bad-block-table scan during SPL boot. With this + option, SPL keeps chip->bbt NULL and nand_block_checkbad() + falls through to chip->block_bad() - an on-demand single-block + OOB read - which is sufficient when SPL only loads a single + FIT image at a known offset and the full BBT scan is too slow + or otherwise problematic in the limited SPL environment. + config NAND_FSL_ELBC bool "Support Freescale Enhanced Local Bus Controller FCM NAND driver" select TPL_SYS_NAND_SELF_INIT if TPL_NAND_SUPPORT diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index 39cb641e0b3..74e19922645 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -1291,6 +1291,10 @@ int denali_init(struct denali_nand_info *denali) /* no subpage writes on denali */ chip->options |= NAND_NO_SUBPAGE_WRITE; + if (IS_ENABLED(CONFIG_XPL_BUILD) && + IS_ENABLED(CONFIG_NAND_DENALI_SKIP_BBTSCAN_SPL)) + chip->options |= NAND_SKIP_BBTSCAN; + ret = denali_ecc_setup(mtd, chip, denali); if (ret) { dev_err(denali->dev, "Failed to setup ECC settings.\n"); -- 2.43.7
