> -----Original Message-----
> From: Jason Cooper [mailto:u-b...@lakedaemon.net]
> Sent: Wednesday, July 27, 2011 2:49 AM
> To: cl...@debian.org; w...@denx.de; Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; Prabhanjan Sarnaik; Ashish Karkare; Siddarth
> Gore; bd...@gag.com; Jason Cooper
> Subject: RFC [PATCH 2/5] arm/kirkwood: print speeds with cpu info.
>
>
> Signed-off-by: Jason Cooper <u-b...@lakedaemon.net>
> ---
> arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 46
> ++++++++++++++++++++++++++++++
> arch/arm/include/asm/arch-kirkwood/cpu.h | 1 +
> 2 files changed, 47 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> index b4a4c04..a69f9f2 100644
> --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> @@ -270,11 +270,26 @@ static void kw_sysrst_check(void)
> }
>
> #if defined(CONFIG_DISPLAY_CPUINFO)
> +#define MSAR_CPUCLCK_EXTRACT(X) (((X & 0x2) >> 1) | ((X & 0x400000) >>
> 21) | \
> + ((X & 0x18) >> 1))
> +#define MSAR_L2CLCK_EXTRACT(X) (((X & 0x600) >> 9) | ((X & 0x80000) >>
> 17))
> +#define MSAR_DDRCLCK_RTIO_MASK (0xf << 5)
> +
> +#define MSAR_TCLCK_OFFS 21
> +#define MSAR_TCLCK_MASK (0x1 << MSAR_TCLCK_OFFS)
> +#define MV_BOARD_TCLK_166MHZ 166666667
> +#define MV_BOARD_TCLK_200MHZ 200000000
> +#define MSAR_TCLCK_167 (0x1 << MSAR_TCLCK_OFFS)
> +#define MSAR_TCLCK_200 (0x0 << MSAR_TCLCK_OFFS)
There are one time used macros, can they be optimized?
> +
> int print_cpuinfo(void)
> {
> char *rev;
> u16 devid = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff;
> u8 revid = readl(KW_REG_PCIE_REVID) & 0xff;
> + u32 cpu_clk, t_clk, tmp;
> + u32 sys_clk, l2_clk;
> + u32 l2_ratio, ddr_ratio;
>
> if ((readl(KW_REG_DEVICE_ID) & 0x03) > 2) {
> printf("Error.. %s:Unsupported Kirkwood SoC 88F%04x\n",
> __FUNCTION__, devid);
> @@ -297,6 +312,37 @@ int print_cpuinfo(void)
> }
>
> printf("SoC: Kirkwood 88F%04x_%s\n", devid, rev);
> +
> + tmp = readl(MPP_SAMPLE_AT_RESET);
> + cpu_clk = MSAR_CPUCLCK_EXTRACT(tmp);
> + if (cpu_clk == 0x9)
> + cpu_clk = 1200;
> +
> + l2_ratio = MSAR_L2CLCK_EXTRACT(tmp);
> + l2_clk = cpu_clk / l2_ratio;
> +
> + ddr_ratio = tmp & MSAR_DDRCLCK_RTIO_MASK;
> + ddr_ratio = ddr_ratio >> 5;
> + if (ddr_ratio == 4)
> + sys_clk = 400;
> +
> + switch (tmp & MSAR_TCLCK_MASK) {
> + case MSAR_TCLCK_167:
> + t_clk = MV_BOARD_TCLK_166MHZ;
> + break;
> + case MSAR_TCLCK_200:
> + t_clk = MV_BOARD_TCLK_200MHZ;
> + break;
> + default:
> + t_clk = MV_BOARD_TCLK_200MHZ;
> + break;
> + }
> +
> + printf("CPU running @ %dMHz L2 running @ %dMHz\n",
> + cpu_clk, l2_clk);
> + printf("SysClock = %dMHz, TClock = %dMHz\n",
> + sys_clk, t_clk / 1000000);
It is good to encapsulate this in #ifdef CONFIG_SYS_XXX
> +
> return 0;
> }
> #endif /* CONFIG_DISPLAY_CPUINFO */
> diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h
> b/arch/arm/include/asm/arch-kirkwood/cpu.h
> index d28c51a..28ddd25 100644
> --- a/arch/arm/include/asm/arch-kirkwood/cpu.h
> +++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
> @@ -41,6 +41,7 @@
> #define KW_REG_SYSRST_CNT (KW_MPP_BASE + 0x50)
> #define SYSRST_CNT_1SEC_VAL (25*1000000)
> #define KW_REG_MPP_OUT_DRV_REG (KW_MPP_BASE + 0xE0)
> +#define MPP_SAMPLE_AT_RESET (KW_MPP_BASE + 0x30)
>
> enum memory_bank {
> BANK0,
> --
Regards..
Prafulla . .
> 1.7.0.4
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