On Wed, Mar 04, 2026 at 11:04:03AM -0600, David Lechner wrote:
> Change CLK_TOP_CLK26M rate from 260_000_000 to 26_000_000. As the name
> implies, this clocks is 26 MHz, not 260 MHz.
>
> Fixes: 11f3cc46322a ("clk: mediatek: add MT8188 clock driver")
> Signed-off-by: David Lechner <[email protected]>
> ---
> This fixes a bug in master, the intention is for this to go through
> master. I have some other changes prepared (not sent yet) for the next
> branch that will conflict with this. I assume the thing to do there is
> wait for the next rc release when master gets merged back into next?Doing it this way will make it easier on you in the end, yeah. -- Tom
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