On 11/26/2025 7:56 PM, Casey Connolly wrote:
Hi Balaji,
On 24/11/2025 16:55, Balaji Selvanathan wrote:
Override the USB QMP PHY clock properties to use only GCC clocks
supported in U-Boot, removing the unsupported RPMH_CXO_CLK from
the qcs6490-rb3gen2's device tree.
That clock should be handled by the stub clock driver, are you seeing an
error without this patch (with CONFIG_CLK_STUB=y)?
You are right. With CONFIG_CLK_STUB=y, it is working fine without any
additions in override dts file. So have removed this patch in this
respin:
https://lore.kernel.org/u-boot/[email protected]/
Thanks,
Balaji
Signed-off-by: Balaji Selvanathan <[email protected]>
---
arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi
b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi
index 50674b692ed..14669b50821 100644
--- a/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi
+++ b/arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi
@@ -22,6 +22,14 @@
/delete-property/ usb-role-switch;
};
+&usb_1_qmpphy {
+ clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+ clock-names = "aux",
+ "com_aux",
+ "usb3_pipe";
+};
// RAM Entry 0 : Base 0x0080000000 Size 0x003A800000
// RAM Entry 1 : Base 0x00C0000000 Size 0x0001800000
// RAM Entry 2 : Base 0x00C3400000 Size 0x003CC00000
