Am 09.08.25 um 03:04 schrieb Mikhail Kshevetskiy:
> This makes u-boot spinand driver almost the same as spinand driver
> from linux-6.10. The only major difference is support of ECC engines.
> The linux driver supports different ECC engines while u-boot driver
> uses on-die ecc only.
Suggestion for subject and commit message:
###
mtd: spinand: Sync device support with Linux 6.10
This makes the U-Boot SPI NAND driver almost the same as in Linux 6.10.
The only major difference is support of ECC engines. The Linux driver
supports different ECC engines while U-Boot uses on-die ECC only.
###
>
> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevets...@iopsys.eu>
> ---
> drivers/mtd/nand/spi/Makefile | 4 +-
> drivers/mtd/nand/spi/alliancememory.c | 155 ++++++++++++++++++++++++++
> drivers/mtd/nand/spi/ato.c | 84 ++++++++++++++
> drivers/mtd/nand/spi/core.c | 151 +++++++++++++++++++------
> drivers/mtd/nand/spi/esmt.c | 16 ++-
> drivers/mtd/nand/spi/foresee.c | 97 ++++++++++++++++
> drivers/mtd/nand/spi/gigadevice.c | 6 +-
> drivers/mtd/nand/spi/macronix.c | 32 +++++-
> drivers/mtd/nand/spi/micron.c | 2 +-
> drivers/mtd/nand/spi/toshiba.c | 43 ++++++-
> drivers/mtd/nand/spi/winbond.c | 55 ++++++++-
> include/linux/mtd/nand.h | 23 ++++
> include/linux/mtd/spinand.h | 10 +-
> 13 files changed, 619 insertions(+), 59 deletions(-)
> create mode 100644 drivers/mtd/nand/spi/alliancememory.c
> create mode 100644 drivers/mtd/nand/spi/ato.c
> create mode 100644 drivers/mtd/nand/spi/foresee.c
>
> diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
> index 65b836b34ca..d438747cf37 100644
> --- a/drivers/mtd/nand/spi/Makefile
> +++ b/drivers/mtd/nand/spi/Makefile
> @@ -1,5 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0
>
> -spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o
> -spinand-objs += toshiba.o winbond.o xtx.o
> +spinand-objs := core.o alliancememory.o ato.o esmt.o foresee.o gigadevice.o
> macronix.o
> +spinand-objs += micron.o paragon.o toshiba.o winbond.o xtx.o
> obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
> diff --git a/drivers/mtd/nand/spi/alliancememory.c
> b/drivers/mtd/nand/spi/alliancememory.c
> new file mode 100644
> index 00000000000..e29e4cc77ec
> --- /dev/null
> +++ b/drivers/mtd/nand/spi/alliancememory.c
> @@ -0,0 +1,155 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Author: Mario Kicherer <d...@kicherer.org>
> + */
> +
> +#ifndef __UBOOT__
> +#include <linux/device.h>
> +#include <linux/kernel.h>
> +#endif
> +#include <linux/mtd/spinand.h>
> +
> +#define SPINAND_MFR_ALLIANCEMEMORY 0x52
> +
> +#define AM_STATUS_ECC_BITMASK (3 << 4)
> +
> +#define AM_STATUS_ECC_NONE_DETECTED (0 << 4)
> +#define AM_STATUS_ECC_CORRECTED (1 << 4)
> +#define AM_STATUS_ECC_ERRORED (2 << 4)
> +#define AM_STATUS_ECC_MAX_CORRECTED (3 << 4)
> +
> +static SPINAND_OP_VARIANTS(read_cache_variants,
> + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
> +
> +static SPINAND_OP_VARIANTS(write_cache_variants,
> + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
> + SPINAND_PROG_LOAD(true, 0, NULL, 0));
> +
> +static SPINAND_OP_VARIANTS(update_cache_variants,
> + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
> + SPINAND_PROG_LOAD(false, 0, NULL, 0));
> +
> +static int am_get_eccsize(struct mtd_info *mtd)
> +{
> + if (mtd->oobsize == 64)
> + return 0x20;
> + else if (mtd->oobsize == 128)
> + return 0x38;
> + else if (mtd->oobsize == 256)
> + return 0x70;
> + else
> + return -EINVAL;
> +}
> +
> +static int am_ooblayout_ecc(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *region)
> +{
> + int ecc_bytes;
> +
> + ecc_bytes = am_get_eccsize(mtd);
> + if (ecc_bytes < 0)
> + return ecc_bytes;
> +
> + region->offset = mtd->oobsize - ecc_bytes;
> + region->length = ecc_bytes;
> +
> + return 0;
> +}
> +
> +static int am_ooblayout_free(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *region)
> +{
> + int ecc_bytes;
> +
> + if (section)
> + return -ERANGE;
> +
> + ecc_bytes = am_get_eccsize(mtd);
> + if (ecc_bytes < 0)
> + return ecc_bytes;
> +
> + /*
> + * It is unclear how many bytes are used for the bad block marker. We
> + * reserve the common two bytes here.
> + *
> + * The free area in this kind of flash is divided into chunks where the
> + * first 4 bytes of each chunk are unprotected. The number of chunks
> + * depends on the specific model. The models with 4096+256 bytes pages
> + * have 8 chunks, the others 4 chunks.
> + */
> +
> + region->offset = 2;
> + region->length = mtd->oobsize - 2 - ecc_bytes;
> +
> + return 0;
> +}
> +
> +static const struct mtd_ooblayout_ops am_ooblayout = {
> + .ecc = am_ooblayout_ecc,
> + .rfree = am_ooblayout_free,
> +};
> +
> +static int am_ecc_get_status(struct spinand_device *spinand, u8 status)
> +{
> + switch (status & AM_STATUS_ECC_BITMASK) {
> + case AM_STATUS_ECC_NONE_DETECTED:
> + return 0;
> +
> + case AM_STATUS_ECC_CORRECTED:
> + /*
> + * use oobsize to determine the flash model and the maximum of
> + * correctable errors and return maximum - 1 by convention
> + */
> + if (spinand->base.mtd->oobsize == 64)
> + return 3;
> + else
> + return 7;
> +
> + case AM_STATUS_ECC_ERRORED:
> + return -EBADMSG;
> +
> + case AM_STATUS_ECC_MAX_CORRECTED:
> + /*
> + * use oobsize to determine the flash model and the maximum of
> + * correctable errors
> + */
> + if (spinand->base.mtd->oobsize == 64)
> + return 4;
> + else
> + return 8;
> +
> + default:
> + break;
> + }
> +
> + return -EINVAL;
> +}
> +
> +static const struct spinand_info alliancememory_spinand_table[] = {
> + SPINAND_INFO("AS5F34G04SND",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x2f),
> + NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 1, 1),
> + NAND_ECCREQ(4, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_QE_BIT,
> + SPINAND_ECCINFO(&am_ooblayout,
> + am_ecc_get_status)),
> +};
> +
> +static const struct spinand_manufacturer_ops
> alliancememory_spinand_manuf_ops = {
> +};
> +
> +const struct spinand_manufacturer alliancememory_spinand_manufacturer = {
> + .id = SPINAND_MFR_ALLIANCEMEMORY,
> + .name = "AllianceMemory",
> + .chips = alliancememory_spinand_table,
> + .nchips = ARRAY_SIZE(alliancememory_spinand_table),
> + .ops = &alliancememory_spinand_manuf_ops,
> +};
> diff --git a/drivers/mtd/nand/spi/ato.c b/drivers/mtd/nand/spi/ato.c
> new file mode 100644
> index 00000000000..f0d4436cf45
> --- /dev/null
> +++ b/drivers/mtd/nand/spi/ato.c
> @@ -0,0 +1,84 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2022 Aidan MacDonald
> + *
> + * Author: Aidan MacDonald <aidanmacdonald....@gmail.com>
> + */
> +
> +#ifndef __UBOOT__
> +#include <linux/device.h>
> +#include <linux/kernel.h>
> +#endif
> +#include <linux/mtd/spinand.h>
> +
> +#define SPINAND_MFR_ATO 0x9b
> +
> +static SPINAND_OP_VARIANTS(read_cache_variants,
> + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
> +
> +static SPINAND_OP_VARIANTS(write_cache_variants,
> + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
> + SPINAND_PROG_LOAD(true, 0, NULL, 0));
> +
> +static SPINAND_OP_VARIANTS(update_cache_variants,
> + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
> + SPINAND_PROG_LOAD(false, 0, NULL, 0));
> +
> +static int ato25d1ga_ooblayout_ecc(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *region)
> +{
> + if (section > 3)
> + return -ERANGE;
> +
> + region->offset = (16 * section) + 8;
> + region->length = 8;
> + return 0;
> +}
> +
> +static int ato25d1ga_ooblayout_free(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *region)
> +{
> + if (section > 3)
> + return -ERANGE;
> +
> + if (section) {
> + region->offset = (16 * section);
> + region->length = 8;
> + } else {
> + /* first byte of section 0 is reserved for the BBM */
> + region->offset = 1;
> + region->length = 7;
> + }
> +
> + return 0;
> +}
> +
> +static const struct mtd_ooblayout_ops ato25d1ga_ooblayout = {
> + .ecc = ato25d1ga_ooblayout_ecc,
> + .rfree = ato25d1ga_ooblayout_free,
> +};
> +
> +static const struct spinand_info ato_spinand_table[] = {
> + SPINAND_INFO("ATO25D1GA",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x12),
> + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
> + NAND_ECCREQ(1, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_QE_BIT,
> + SPINAND_ECCINFO(&ato25d1ga_ooblayout, NULL)),
> +};
> +
> +static const struct spinand_manufacturer_ops ato_spinand_manuf_ops = {
> +};
> +
> +const struct spinand_manufacturer ato_spinand_manufacturer = {
> + .id = SPINAND_MFR_ATO,
> + .name = "ATO",
> + .chips = ato_spinand_table,
> + .nchips = ARRAY_SIZE(ato_spinand_table),
> + .ops = &ato_spinand_manuf_ops,
> +};
> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
> index a6353b37e7f..b4795927277 100644
> --- a/drivers/mtd/nand/spi/core.c
> +++ b/drivers/mtd/nand/spi/core.c
> @@ -239,7 +239,7 @@ static int spinand_check_ecc_status(struct spinand_device
> *spinand, u8 status)
> * fixed, so let's return the maximum possible value so that
> * wear-leveling layers move the data immediately.
> */
> - return nand->eccreq.strength;
> + return nanddev_get_ecc_conf(nand)->strength;
>
> case STATUS_ECC_UNCOR_ERROR:
> return -EBADMSG;
> @@ -275,6 +275,66 @@ static const struct mtd_ooblayout_ops
> spinand_noecc_ooblayout = {
> .rfree = spinand_noecc_ooblayout_free,
> };
>
> +static int spinand_ondie_ecc_init_ctx(struct nand_device *nand)
> +{
> + struct spinand_device *spinand = nand_to_spinand(nand);
> + struct mtd_info *mtd = nanddev_to_mtd(nand);
> +
> + if (spinand->eccinfo.ooblayout)
> + mtd_set_ooblayout(mtd, spinand->eccinfo.ooblayout);
> + else
> + mtd_set_ooblayout(mtd, &spinand_noecc_ooblayout);
> +
> + return 0;
> +}
> +
> +static void spinand_ondie_ecc_cleanup_ctx(struct nand_device *nand)
> +{
> +}
> +
> +static int spinand_ondie_ecc_prepare_io_req(struct nand_device *nand,
> + struct nand_page_io_req *req)
> +{
> + struct spinand_device *spinand = nand_to_spinand(nand);
> + bool enable = (req->mode != MTD_OPS_RAW);
> +
> + memset(spinand->oobbuf, 0xff, nanddev_per_page_oobsize(nand));
> +
> + /* Only enable or disable the engine */
> + return spinand_ecc_enable(spinand, enable);
> +}
> +
> +static int spinand_ondie_ecc_finish_io_req(struct nand_device *nand,
> + struct nand_page_io_req *req)
> +{
> + struct spinand_device *spinand = nand_to_spinand(nand);
> + struct mtd_info *mtd = spinand_to_mtd(spinand);
> + int ret;
> +
> + if (req->mode == MTD_OPS_RAW)
> + return 0;
> +
> + /* Nothing to do when finishing a page write */
> + if (req->type == NAND_PAGE_WRITE)
> + return 0;
> +
> + /* Finish a page read: check the status, report errors/bitflips */
> + ret = spinand_check_ecc_status(spinand, spinand->last_wait_status);
> + if (ret == -EBADMSG)
> + mtd->ecc_stats.failed++;
> + else if (ret > 0)
> + mtd->ecc_stats.corrected += ret;
> +
> + return ret;
> +}
> +
> +static void spinand_ondie_ecc_save_status(struct nand_device *nand, u8
> status)
> +{
> + struct spinand_device *spinand = nand_to_spinand(nand);
> +
> + spinand->last_wait_status = status;
> +}
> +
> static int spinand_write_enable_op(struct spinand_device *spinand)
> {
> struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true);
> @@ -317,7 +377,10 @@ static int spinand_read_from_cache_op(struct
> spinand_device *spinand,
> }
> }
>
> - rdesc = spinand->dirmaps[req->pos.plane].rdesc;
> + if (req->mode == MTD_OPS_RAW)
> + rdesc = spinand->dirmaps[req->pos.plane].rdesc;
> + else
> + rdesc = spinand->dirmaps[req->pos.plane].rdesc_ecc;
>
> while (nbytes) {
> ret = spi_mem_dirmap_read(rdesc, column, nbytes, buf);
> @@ -366,9 +429,12 @@ static int spinand_write_to_cache_op(struct
> spinand_device *spinand,
> * must fill the page cache entirely even if we only want to program
> * the data portion of the page, otherwise we might corrupt the BBM or
> * user data previously programmed in OOB area.
> + *
> + * Only reset the data buffer manually, the OOB buffer is prepared by
> + * ECC engines ->prepare_io_req() callback.
> */
> nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand);
> - memset(spinand->databuf, 0xff, nbytes);
> + memset(spinand->databuf, 0xff, nanddev_page_size(nand));
>
> if (req->datalen)
> memcpy(spinand->databuf + req->dataoffs, req->databuf.out,
> @@ -385,7 +451,10 @@ static int spinand_write_to_cache_op(struct
> spinand_device *spinand,
> req->ooblen);
> }
>
> - wdesc = spinand->dirmaps[req->pos.plane].wdesc;
> + if (req->mode == MTD_OPS_RAW)
> + wdesc = spinand->dirmaps[req->pos.plane].wdesc;
> + else
> + wdesc = spinand->dirmaps[req->pos.plane].wdesc_ecc;
>
> while (nbytes) {
> ret = spi_mem_dirmap_write(wdesc, column, nbytes, buf);
> @@ -498,12 +567,16 @@ static int spinand_lock_block(struct spinand_device
> *spinand, u8 lock)
> }
>
> static int spinand_read_page(struct spinand_device *spinand,
> - const struct nand_page_io_req *req,
> - bool ecc_enabled)
> + const struct nand_page_io_req *req)
> {
> + struct nand_device *nand = spinand_to_nand(spinand);
> u8 status;
> int ret;
>
> + ret = spinand_ondie_ecc_prepare_io_req(nand, (struct nand_page_io_req
> *)req);
> + if (ret)
> + return ret;
> +
> ret = spinand_load_page_op(spinand, req);
> if (ret)
> return ret;
> @@ -515,22 +588,26 @@ static int spinand_read_page(struct spinand_device
> *spinand,
> if (ret < 0)
> return ret;
>
> + spinand_ondie_ecc_save_status(nand, status);
> +
> ret = spinand_read_from_cache_op(spinand, req);
> if (ret)
> return ret;
>
> - if (!ecc_enabled)
> - return 0;
> -
> - return spinand_check_ecc_status(spinand, status);
> + return spinand_ondie_ecc_finish_io_req(nand, (struct nand_page_io_req
> *)req);
> }
>
> static int spinand_write_page(struct spinand_device *spinand,
> const struct nand_page_io_req *req)
> {
> + struct nand_device *nand = spinand_to_nand(spinand);
> u8 status;
> int ret;
>
> + ret = spinand_ondie_ecc_prepare_io_req(nand, (struct nand_page_io_req
> *)req);
> + if (ret)
> + return ret;
> +
> ret = spinand_write_enable_op(spinand);
> if (ret)
> return ret;
> @@ -550,7 +627,7 @@ static int spinand_write_page(struct spinand_device
> *spinand,
> if (!ret && (status & STATUS_PROG_FAILED))
> return -EIO;
>
> - return ret;
> + return spinand_ondie_ecc_finish_io_req(nand, (struct nand_page_io_req
> *)req);
> }
>
> static int spinand_mtd_read(struct mtd_info *mtd, loff_t from,
> @@ -580,21 +657,14 @@ static int spinand_mtd_read(struct mtd_info *mtd,
> loff_t from,
> if (ret)
> break;
>
> - ret = spinand_ecc_enable(spinand, !disable_ecc);
> - if (ret)
> - break;
> -
> - ret = spinand_read_page(spinand, &iter.req, !disable_ecc);
> + ret = spinand_read_page(spinand, &iter.req);
> if (ret < 0 && ret != -EBADMSG)
> break;
>
> - if (ret == -EBADMSG) {
> + if (ret == -EBADMSG)
> ecc_failed = true;
> - mtd->ecc_stats.failed++;
> - } else {
> - mtd->ecc_stats.corrected += ret;
> + else
> max_bitflips = max_t(unsigned int, max_bitflips, ret);
> - }
>
> ret = 0;
> ops->retlen += iter.req.datalen;
> @@ -635,10 +705,6 @@ static int spinand_mtd_write(struct mtd_info *mtd,
> loff_t to,
> if (ret)
> break;
>
> - ret = spinand_ecc_enable(spinand, !disable_ecc);
> - if (ret)
> - break;
> -
> ret = spinand_write_page(spinand, &iter.req);
> if (ret)
> break;
> @@ -667,7 +733,7 @@ static bool spinand_isbad(struct nand_device *nand, const
> struct nand_pos *pos)
> };
>
> spinand_select_target(spinand, pos->target);
> - spinand_read_page(spinand, &req, false);
> + spinand_read_page(spinand, &req);
> if (marker[0] != 0xff || marker[1] != 0xff)
> return true;
>
> @@ -835,6 +901,9 @@ static int spinand_create_dirmap(struct spinand_device
> *spinand,
>
> spinand->dirmaps[plane].rdesc = desc;
>
> + spinand->dirmaps[plane].wdesc_ecc = spinand->dirmaps[plane].wdesc;
> + spinand->dirmaps[plane].rdesc_ecc = spinand->dirmaps[plane].rdesc;
> +
> return 0;
> }
>
> @@ -866,13 +935,16 @@ static const struct nand_ops spinand_ops = {
> };
>
> static const struct spinand_manufacturer *spinand_manufacturers[] = {
> + &alliancememory_spinand_manufacturer,
> + &ato_spinand_manufacturer,
> + &esmt_c8_spinand_manufacturer,
> + &foresee_spinand_manufacturer,
> &gigadevice_spinand_manufacturer,
> ¯onix_spinand_manufacturer,
> µn_spinand_manufacturer,
> ¶gon_spinand_manufacturer,
> &toshiba_spinand_manufacturer,
> &winbond_spinand_manufacturer,
> - &esmt_c8_spinand_manufacturer,
> &xtx_spinand_manufacturer,
> };
>
> @@ -900,7 +972,7 @@ static int spinand_manufacturer_match(struct
> spinand_device *spinand,
> spinand->manufacturer = manufacturer;
> return 0;
> }
> - return -ENOTSUPP;
> + return -EOPNOTSUPP;
> }
>
> static int spinand_id_detect(struct spinand_device *spinand)
> @@ -1034,7 +1106,7 @@ int spinand_match_and_init(struct spinand_device
> *spinand,
> return ret;
>
> nand->memorg = table[i].memorg;
> - nand->eccreq = table[i].eccreq;
> + nanddev_set_ecc_requirements(nand, &table[i].eccreq);
> spinand->eccinfo = table[i].eccinfo;
> spinand->flags = table[i].flags;
> spinand->id.len = 1 + table[i].devid.len;
> @@ -1186,6 +1258,11 @@ static int spinand_init(struct spinand_device *spinand)
> if (ret)
> goto err_manuf_cleanup;
>
> + spinand_ecc_enable(spinand, false);
> + ret = spinand_ondie_ecc_init_ctx(nand);
> + if (ret)
> + goto err_cleanup_nanddev;
> +
> mtd->_read_oob = spinand_mtd_read;
> mtd->_write_oob = spinand_mtd_write;
> mtd->_block_isbad = spinand_mtd_block_isbad;
> @@ -1193,27 +1270,29 @@ static int spinand_init(struct spinand_device
> *spinand)
> mtd->_block_isreserved = spinand_mtd_block_isreserved;
> mtd->_erase = spinand_mtd_erase;
>
> - if (spinand->eccinfo.ooblayout)
> - mtd_set_ooblayout(mtd, spinand->eccinfo.ooblayout);
> - else
> - mtd_set_ooblayout(mtd, &spinand_noecc_ooblayout);
> -
> ret = mtd_ooblayout_count_freebytes(mtd);
> if (ret < 0)
> - goto err_cleanup_nanddev;
> + goto err_cleanup_ecc_engine;
>
> mtd->oobavail = ret;
>
> + /* Propagate ECC information to mtd_info */
> + mtd->ecc_strength = nanddev_get_ecc_conf(nand)->strength;
> + mtd->ecc_step_size = nanddev_get_ecc_conf(nand)->step_size;
> +
> ret = spinand_create_dirmaps(spinand);
> if (ret) {
> dev_err(dev,
> "Failed to create direct mappings for read/write
> operations (err = %d)\n",
> ret);
> - goto err_cleanup_nanddev;
> + goto err_cleanup_ecc_engine;
> }
>
> return 0;
>
> +err_cleanup_ecc_engine:
> + spinand_ondie_ecc_cleanup_ctx(nand);
> +
> err_cleanup_nanddev:
> nanddev_cleanup(nand);
>
> diff --git a/drivers/mtd/nand/spi/esmt.c b/drivers/mtd/nand/spi/esmt.c
> index 7e07b26827a..23be098b885 100644
> --- a/drivers/mtd/nand/spi/esmt.c
> +++ b/drivers/mtd/nand/spi/esmt.c
> @@ -106,7 +106,8 @@ static const struct mtd_ooblayout_ops
> f50l1g41lb_ooblayout = {
>
> static const struct spinand_info esmt_c8_spinand_table[] = {
> SPINAND_INFO("F50L1G41LB",
> - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f,
> + 0x7f, 0x7f),
> NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
> NAND_ECCREQ(1, 512),
> SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> @@ -115,7 +116,8 @@ static const struct spinand_info esmt_c8_spinand_table[]
> = {
> 0,
> SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
> SPINAND_INFO("F50D1G41LB",
> - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f,
> + 0x7f, 0x7f),
> NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
> NAND_ECCREQ(1, 512),
> SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> @@ -123,6 +125,16 @@ static const struct spinand_info esmt_c8_spinand_table[]
> = {
> &update_cache_variants),
> 0,
> SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
> + SPINAND_INFO("F50D2G41KA",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51, 0x7f,
> + 0x7f, 0x7f),
> + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
> };
>
> static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
> diff --git a/drivers/mtd/nand/spi/foresee.c b/drivers/mtd/nand/spi/foresee.c
> new file mode 100644
> index 00000000000..6229c959b2c
> --- /dev/null
> +++ b/drivers/mtd/nand/spi/foresee.c
> @@ -0,0 +1,97 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2023, SberDevices. All Rights Reserved.
> + *
> + * Author: Martin Kurbanov <mmkurba...@salutedevices.com>
> + */
> +
> +#ifndef __UBOOT__
> +#include <linux/device.h>
> +#include <linux/kernel.h>
> +#endif
> +#include <linux/mtd/spinand.h>
> +
> +#define SPINAND_MFR_FORESEE 0xCD
> +
> +static SPINAND_OP_VARIANTS(read_cache_variants,
> + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
> + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
> +
> +static SPINAND_OP_VARIANTS(write_cache_variants,
> + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
> + SPINAND_PROG_LOAD(true, 0, NULL, 0));
> +
> +static SPINAND_OP_VARIANTS(update_cache_variants,
> + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
> + SPINAND_PROG_LOAD(false, 0, NULL, 0));
> +
> +static int f35sqa002g_ooblayout_ecc(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *region)
> +{
> + return -ERANGE;
> +}
> +
> +static int f35sqa002g_ooblayout_free(struct mtd_info *mtd, int section,
> + struct mtd_oob_region *region)
> +{
> + if (section)
> + return -ERANGE;
> +
> + /* Reserve 2 bytes for the BBM. */
> + region->offset = 2;
> + region->length = 62;
> +
> + return 0;
> +}
> +
> +static const struct mtd_ooblayout_ops f35sqa002g_ooblayout = {
> + .ecc = f35sqa002g_ooblayout_ecc,
> + .rfree = f35sqa002g_ooblayout_free,
> +};
> +
> +static int f35sqa002g_ecc_get_status(struct spinand_device *spinand, u8
> status)
> +{
> + struct nand_device *nand = spinand_to_nand(spinand);
> +
> + switch (status & STATUS_ECC_MASK) {
> + case STATUS_ECC_NO_BITFLIPS:
> + return 0;
> +
> + case STATUS_ECC_HAS_BITFLIPS:
> + return nanddev_get_ecc_conf(nand)->strength;
> +
> + default:
> + break;
> + }
> +
> + /* More than 1-bit error was detected in one or more sectors and
> + * cannot be corrected.
> + */
> + return -EBADMSG;
> +}
> +
> +static const struct spinand_info foresee_spinand_table[] = {
> + SPINAND_INFO("F35SQA002G",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72, 0x72),
> + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(1, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_QE_BIT,
> + SPINAND_ECCINFO(&f35sqa002g_ooblayout,
> + f35sqa002g_ecc_get_status)),
> +};
> +
> +static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = {
> +};
> +
> +const struct spinand_manufacturer foresee_spinand_manufacturer = {
> + .id = SPINAND_MFR_FORESEE,
> + .name = "FORESEE",
> + .chips = foresee_spinand_table,
> + .nchips = ARRAY_SIZE(foresee_spinand_table),
> + .ops = &foresee_spinand_manuf_ops,
> +};
> diff --git a/drivers/mtd/nand/spi/gigadevice.c
> b/drivers/mtd/nand/spi/gigadevice.c
> index fe8c76acac6..f3608a13d8e 100644
> --- a/drivers/mtd/nand/spi/gigadevice.c
> +++ b/drivers/mtd/nand/spi/gigadevice.c
> @@ -190,7 +190,7 @@ static int gd5fxgq4uexxg_ecc_get_status(struct
> spinand_device *spinand,
> {
> u8 status2;
> struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
> - &status2);
> + spinand->scratchbuf);
> int ret;
>
> switch (status & STATUS_ECC_MASK) {
> @@ -211,6 +211,7 @@ static int gd5fxgq4uexxg_ecc_get_status(struct
> spinand_device *spinand,
> * report the maximum of 4 in this case
> */
> /* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */
> + status2 = *(spinand->scratchbuf);
> return ((status & STATUS_ECC_MASK) >> 2) |
> ((status2 & STATUS_ECC_MASK) >> 4);
>
> @@ -232,7 +233,7 @@ static int gd5fxgq5xexxg_ecc_get_status(struct
> spinand_device *spinand,
> {
> u8 status2;
> struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
> - &status2);
> + spinand->scratchbuf);
> int ret;
>
> switch (status & STATUS_ECC_MASK) {
> @@ -252,6 +253,7 @@ static int gd5fxgq5xexxg_ecc_get_status(struct
> spinand_device *spinand,
> * 1 ... 4 bits are flipped (and corrected)
> */
> /* bits sorted this way (1...0): ECCSE1, ECCSE0 */
> + status2 = *(spinand->scratchbuf);
> return ((status2 & STATUS_ECC_MASK) >> 4) + 1;
>
> case STATUS_ECC_UNCOR_ERROR:
> diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
> index 86bffc2800b..c2a7aa2da96 100644
> --- a/drivers/mtd/nand/spi/macronix.c
> +++ b/drivers/mtd/nand/spi/macronix.c
> @@ -23,7 +23,7 @@ static SPINAND_OP_VARIANTS(read_cache_variants,
>
> static SPINAND_OP_VARIANTS(write_cache_variants,
> SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
> - SPINAND_PROG_LOAD(true, 0, NULL, 0));
> + SPINAND_PROG_LOAD(false, 0, NULL, 0));
>
> static SPINAND_OP_VARIANTS(update_cache_variants,
> SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
> @@ -86,11 +86,13 @@ static int mx35lf1ge4ab_ecc_get_status(struct
> spinand_device *spinand,
> * in order to avoid forcing the wear-leveling layer to move
> * data around if it's not necessary.
> */
> - if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
> - return nand->eccreq.strength;
> + if (mx35lf1ge4ab_get_eccsr(spinand, spinand->scratchbuf))
> + return nanddev_get_ecc_conf(nand)->strength;
>
> - if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
> - return nand->eccreq.strength;
> + eccsr = *spinand->scratchbuf;
> + if (WARN_ON(eccsr > nanddev_get_ecc_conf(nand)->strength ||
> + !eccsr))
> + return nanddev_get_ecc_conf(nand)->strength;
>
> return eccsr;
>
> @@ -300,6 +302,26 @@ static const struct spinand_info
> macronix_spinand_table[] = {
> SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> mx35lf1ge4ab_ecc_get_status)),
>
> + SPINAND_INFO("MX31LF2GE4BC",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x2e),
> + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_QE_BIT,
> + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> + mx35lf1ge4ab_ecc_get_status)),
> + SPINAND_INFO("MX3UF2GE4BC",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae),
> + NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + SPINAND_HAS_QE_BIT,
> + SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
> + mx35lf1ge4ab_ecc_get_status)),
> };
>
> static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
> diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
> index b538213ed8e..01c177facfb 100644
> --- a/drivers/mtd/nand/spi/micron.c
> +++ b/drivers/mtd/nand/spi/micron.c
> @@ -14,7 +14,7 @@
>
> #define SPINAND_MFR_MICRON 0x2c
>
> -#define MICRON_STATUS_ECC_MASK GENMASK(7, 4)
> +#define MICRON_STATUS_ECC_MASK GENMASK(6, 4)
> #define MICRON_STATUS_ECC_NO_BITFLIPS (0 << 4)
> #define MICRON_STATUS_ECC_1TO3_BITFLIPS (1 << 4)
> #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
> diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
> index b9908e79271..bf7da57de13 100644
> --- a/drivers/mtd/nand/spi/toshiba.c
> +++ b/drivers/mtd/nand/spi/toshiba.c
> @@ -76,7 +76,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct
> spinand_device *spinand,
> {
> struct nand_device *nand = spinand_to_nand(spinand);
> u8 mbf = 0;
> - struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
> + struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30,
> spinand->scratchbuf);
>
> switch (status & STATUS_ECC_MASK) {
> case STATUS_ECC_NO_BITFLIPS:
> @@ -93,12 +93,12 @@ static int tx58cxgxsxraix_ecc_get_status(struct
> spinand_device *spinand,
> * data around if it's not necessary.
> */
> if (spi_mem_exec_op(spinand->slave, &op))
> - return nand->eccreq.strength;
> + return nanddev_get_ecc_conf(nand)->strength;
>
> - mbf >>= 4;
> + mbf = *(spinand->scratchbuf) >> 4;
>
> - if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
> - return nand->eccreq.strength;
> + if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf))
> + return nanddev_get_ecc_conf(nand)->strength;
>
> return mbf;
>
> @@ -269,6 +269,39 @@ static const struct spinand_info toshiba_spinand_table[]
> = {
> SPINAND_HAS_QE_BIT,
> SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
> tx58cxgxsxraix_ecc_get_status)),
> + /* 1.8V 1Gb (1st generation) */
> + SPINAND_INFO("TC58NYG0S3HBAI4",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
> + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
> + tx58cxgxsxraix_ecc_get_status)),
> + /* 1.8V 4Gb (1st generation) */
> + SPINAND_INFO("TH58NYG2S3HBAI4",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAC),
> + NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 2, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_x4_variants,
> + &update_cache_x4_variants),
> + SPINAND_HAS_QE_BIT,
> + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
> + tx58cxgxsxraix_ecc_get_status)),
> + /* 1.8V 8Gb (1st generation) */
> + SPINAND_INFO("TH58NYG3S0HBAI6",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA3),
> + NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_x4_variants,
> + &update_cache_x4_variants),
> + SPINAND_HAS_QE_BIT,
> + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
> + tx58cxgxsxraix_ecc_get_status)),
> };
>
> static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
> diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
> index 16abf89dbbf..fc3e3855d41 100644
> --- a/drivers/mtd/nand/spi/winbond.c
> +++ b/drivers/mtd/nand/spi/winbond.c
> @@ -114,7 +114,7 @@ static int w25n02kv_ecc_get_status(struct spinand_device
> *spinand,
> {
> struct nand_device *nand = spinand_to_nand(spinand);
> u8 mbf = 0;
> - struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
> + struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30,
> spinand->scratchbuf);
>
> switch (status & STATUS_ECC_MASK) {
> case STATUS_ECC_NO_BITFLIPS:
> @@ -131,12 +131,12 @@ static int w25n02kv_ecc_get_status(struct
> spinand_device *spinand,
> * data around if it's not necessary.
> */
> if (spi_mem_exec_op(spinand->slave, &op))
> - return nand->eccreq.strength;
> + return nanddev_get_ecc_conf(nand)->strength;
>
> - mbf >>= 4;
> + mbf = *(spinand->scratchbuf) >> 4;
>
> - if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
> - return nand->eccreq.strength;
> + if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf))
> + return nanddev_get_ecc_conf(nand)->strength;
>
> return mbf;
>
> @@ -176,6 +176,51 @@ static const struct spinand_info winbond_spinand_table[]
> = {
> &update_cache_variants),
> 0,
> SPINAND_ECCINFO(&w25n02kv_ooblayout,
> w25n02kv_ecc_get_status)),
> + SPINAND_INFO("W25N01JW",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbc, 0x21),
> + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
> + NAND_ECCREQ(4, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&w25m02gv_ooblayout,
> w25n02kv_ecc_get_status)),
> + SPINAND_INFO("W25N02JWZEIF",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbf, 0x22),
> + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 2, 1),
> + NAND_ECCREQ(4, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&w25n02kv_ooblayout,
> w25n02kv_ecc_get_status)),
> + SPINAND_INFO("W25N512GW",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x20),
> + NAND_MEMORG(1, 2048, 64, 64, 512, 10, 1, 1, 1),
> + NAND_ECCREQ(4, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&w25n02kv_ooblayout,
> w25n02kv_ecc_get_status)),
> + SPINAND_INFO("W25N02KWZEIR",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x22),
> + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
> + NAND_ECCREQ(8, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&w25n02kv_ooblayout,
> w25n02kv_ecc_get_status)),
> + SPINAND_INFO("W25N01GWZEIG",
> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x21),
> + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
> + NAND_ECCREQ(4, 512),
> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> + &write_cache_variants,
> + &update_cache_variants),
> + 0,
> + SPINAND_ECCINFO(&w25m02gv_ooblayout,
> w25n02kv_ecc_get_status)),
> SPINAND_INFO("W25N04KV",
> SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23),
> NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 2, 1, 1),
> diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
> index 0afdaed5715..910ef56ed0c 100644
> --- a/include/linux/mtd/nand.h
> +++ b/include/linux/mtd/nand.h
> @@ -370,6 +370,29 @@ nanddev_get_memorg(struct nand_device *nand)
> return &nand->memorg;
> }
>
> +/**
> + * nanddev_get_ecc_conf() - Extract the ECC configuration from a NAND device
> + * @nand: NAND device
> + */
> +static inline const struct nand_ecc_req *
> +nanddev_get_ecc_conf(struct nand_device *nand)
> +{
> + return &nand->eccreq;
> +}
> +
> +/**
> + * nanddev_set_ecc_requirements() - Assign the ECC requirements of a NAND
> + * device
> + * @nand: NAND device
> + * @reqs: Requirements
> + */
> +static inline void
> +nanddev_set_ecc_requirements(struct nand_device *nand,
> + const struct nand_ecc_req *reqs)
> +{
> + nand->eccreq = *reqs;
> +}
> +
> int nanddev_init(struct nand_device *nand, const struct nand_ops *ops,
> struct module *owner);
> void nanddev_cleanup(struct nand_device *nand);
> diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
> index ba6c2ba149d..011861dd059 100644
> --- a/include/linux/mtd/spinand.h
> +++ b/include/linux/mtd/spinand.h
> @@ -266,13 +266,16 @@ struct spinand_manufacturer {
> };
>
> /* SPI NAND manufacturers */
> +extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
> +extern const struct spinand_manufacturer ato_spinand_manufacturer;
> +extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
> +extern const struct spinand_manufacturer foresee_spinand_manufacturer;
> extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
> extern const struct spinand_manufacturer macronix_spinand_manufacturer;
> extern const struct spinand_manufacturer micron_spinand_manufacturer;
> extern const struct spinand_manufacturer paragon_spinand_manufacturer;
> extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
> extern const struct spinand_manufacturer winbond_spinand_manufacturer;
> -extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
> extern const struct spinand_manufacturer xtx_spinand_manufacturer;
>
> /**
> @@ -388,6 +391,8 @@ struct spinand_info {
> struct spinand_dirmap {
> struct spi_mem_dirmap_desc *wdesc;
> struct spi_mem_dirmap_desc *rdesc;
> + struct spi_mem_dirmap_desc *wdesc_ecc;
> + struct spi_mem_dirmap_desc *rdesc_ecc;
> };
>
> /**
> @@ -415,6 +420,8 @@ struct spinand_dirmap {
> * the stack
> * @manufacturer: SPI NAND manufacturer information
> * @priv: manufacturer private data
> + * @last_wait_status: status of the last wait operation that will be used in
> case
> + * ->get_status() is not populated by the spinand device.
> */
> struct spinand_device {
> struct nand_device base;
> @@ -447,6 +454,7 @@ struct spinand_device {
> u8 *scratchbuf;
> const struct spinand_manufacturer *manufacturer;
> void *priv;
> + u8 last_wait_status;
> };
>
> /**
