On 7/11/25 2:39 PM, Magnus Damm wrote:
Hello Magnus,
sorry for the late reply.
Would it be possible to split this change into multiple easier-to-review
patches ?
--- 0004/drivers/net/sh_eth.c
+++ work/drivers/net/sh_eth.c 2025-07-11 20:31:22.438699670 +0900
@@ -29,6 +29,8 @@
#include "sh_eth.h"
+DECLARE_GLOBAL_DATA_PTR;
+
This shouldn't be required , why is it required ?
@@ -236,34 +236,37 @@ static const u16 sh_eth_offset_rz[SH_ETH
[FCFTR] = 0x0468,
[CSMR] = 0x04E4,
- [ECMR] = 0x0500,
+ [ECMR] = 0x0500, /* ECMR0 @ 0xE8203500 */
[ECSR] = 0x0510,
[ECSIPR] = 0x0518,
[PIR] = 0x0520,
- [PSR] = 0x0528,
- [PIPR] = 0x052c,
- [RFLR] = 0x0508,
- [APR] = 0x0554,
- [MPR] = 0x0558,
- [PFTCR] = 0x055c,
- [PFRCR] = 0x0560,
- [TPAUSER] = 0x0564,
- [GECMR] = 0x05b0,
- [BCULR] = 0x05b4,
[MAHR] = 0x05c0,
[MALR] = 0x05c8,
- [TROCR] = 0x0700,
- [CDCR] = 0x0708,
- [LCCR] = 0x0710,
+ [RFLR] = 0x0508,
[CEFCR] = 0x0740,
[FRECR] = 0x0748,
[TSFRCR] = 0x0750,
[TLFRCR] = 0x0758,
[RFCR] = 0x0760,
- [CERCR] = 0x0768,
- [CEECR] = 0x0770,
[MAFCR] = 0x0778,
- [RMII_MII] = 0x0790,
+ [APR] = 0x0554,
+ [MPR] = 0x0558,
+ [TPAUSER] = 0x0564,
+ [PFTCR] = 0x055c,
+ [PFRCR] = 0x0560,
+
+ // according to RZ/A1H Group, RZ/A1M Group Users Manual: Hardware
+ // Rev.6.00 Jan 2021, the following registers do not exist
+ //[PSR] = 0x0528,
+ //[PIPR] = 0x052c,
+ //[GECMR] = 0x05b0,
+ //[BCULR] = 0x05b4,
+ //[TROCR] = 0x0700,
+ //[CDCR] = 0x0708,
+ //[LCCR] = 0x0710,
+ //[CERCR] = 0x0768,
+ //[CEECR] = 0x0770,
+ //[RMII_MII] = 0x0790,
/*
* Please use
* block comments
*/
+static inline int sh_eth_is_gether(struct sh_eth_info *port)
+{
+#if defined(SH_ETH_TYPE_GETHER)
+ return 1;
+#else
+ return 0;
+#endif
I think the only thing which currently supports GETHER in U-Boot is
R-Car V3H , so this could easily become:
return renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77980;
