On Thu, Jun 12, 2025 at 02:20:22PM +0530, Hrushikesh Salunke wrote: > Add support for Endpoint mode of operation in the Cadence PCIe > Controller present on TI's K3 SoCs. This driver is an adaptation of the > Linux driver.
Please mention what release you're adopting from as it will make future resyncs easier. > > Signed-off-by: Hrushikesh Salunke <h-salu...@ti.com> > --- > drivers/pci_endpoint/Kconfig | 6 + > drivers/pci_endpoint/Makefile | 1 + > drivers/pci_endpoint/pcie_cdns_ti_ep.c | 399 +++++++++++++++++++++++++ > 3 files changed, 406 insertions(+) > create mode 100644 drivers/pci_endpoint/pcie_cdns_ti_ep.c > > diff --git a/drivers/pci_endpoint/Kconfig b/drivers/pci_endpoint/Kconfig > index 19cfa0aafb5..413556a4982 100644 > --- a/drivers/pci_endpoint/Kconfig > +++ b/drivers/pci_endpoint/Kconfig > @@ -22,6 +22,12 @@ config PCIE_CADENCE_EP > endpoint mode. This PCIe controller may be embedded into many > different vendors SoCs. > > +config PCIE_CDNS_TI_EP > + bool "TI K3 PCIe EP support" > + help > + Say Y here to enable support for the Canence PCIe Controller > + in Endpoint Mode on TI's K3 Socs. Spacing is off. > + > config PCI_SANDBOX_EP > bool "Sandbox PCIe endpoint controller" > depends on PCI_ENDPOINT > diff --git a/drivers/pci_endpoint/Makefile b/drivers/pci_endpoint/Makefile > index 3cd987259d3..62a865c4463 100644 > --- a/drivers/pci_endpoint/Makefile > +++ b/drivers/pci_endpoint/Makefile > @@ -6,3 +6,4 @@ > obj-y += pci_ep-uclass.o > obj-$(CONFIG_PCIE_CADENCE_EP) += pcie-cadence-ep.o > obj-$(CONFIG_PCI_SANDBOX_EP) += sandbox-pci_ep.o > +obj-$(CONFIG_PCIE_CDNS_TI_EP) += pcie_cdns_ti_ep.o > diff --git a/drivers/pci_endpoint/pcie_cdns_ti_ep.c > b/drivers/pci_endpoint/pcie_cdns_ti_ep.c > new file mode 100644 > index 00000000000..18b9e45911e > --- /dev/null > +++ b/drivers/pci_endpoint/pcie_cdns_ti_ep.c > @@ -0,0 +1,399 @@ > +// SPDX-License-Identifier: GPL-2.0-only OR MIT > +/* > + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com > + * > + * PCIe Endpoint controller driver for TI's K3 SoCs with Cadence PCIe > controller > + * > + * Ported from the Linux driver - drivers/pci/controller/cadence/pci-j721e.c > + * > + * Author: Hrushikesh Salunke <h-salu...@ti.com> > + * > + */ > + > +#include <asm/gpio.h> > +#include <clk-uclass.h> > +#include <dm.h> > +#include <dm/device_compat.h> > +#include <generic-phy.h> > +#include <linux/delay.h> > +#include <linux/io.h> > +#include <linux/ioport.h> > +#include <linux/log2.h> > +#include <linux/sizes.h> > +#include <power-domain.h> > +#include <regmap.h> > +#include <syscon.h> > +#include <pcie-cadence.h> > +#include <pci_ep.h> Please audit this include list. Otherwise seems fine, thanks. -- Tom
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