Hi Quentin,
On 2025/6/6 17:15, Quentin Schulz wrote:
Hi Kever,
On 6/6/25 11:09 AM, Kever Yang wrote:
Hi Quentin,
On 2025/5/28 20:00, Quentin Schulz wrote:
From: Quentin Schulz <quentin.sch...@cherry.de>
This implements checkboard() to print the current SoC model used by a
board, e.g. one of:
SoC: PX30
SoC: PX30K
when U-Boot proper is running.
The information is read from the OTP. There's no public information as
far as I know about the layout and stored information but this was
provided by Rockchip themselves through their support channel.
I'm aware of at least one other variant, the PX30S/PX30-S but I have
neither a board with that SoC nor the information of what the value in
the OTP is supposed to be. If it follows what was done for RK3588
variants, where the letter is derived from some offset added to the
value read from the OTP, PX30S could be represented by 0x33 in the
OTP. I'm assuming this is correct and simply printing the char
represented by this offset added to the value in the OTP instead of
checking whether it's 0x21 (PX30) or 0x28 (PX30K) or bailing out.
Also add the OTP node to the pre-relocation phase of U-Boot proper so
that the SoC variant can be printed when DISPLAY_BOARDINFO is enabled.
This is not required if DISPLAY_BOARDINFO_LATE is enabled because this
happens after relocation. If both are enabled, then the SoC variant
will
be printed twice in the boot log, e.g.:
U-Boot 2025.07-rc3-00014-g7cb731574ae6-dirty (May 28 2025 - 13:52:47
+0200)
Model: Theobroma Systems PX30-uQ7 SoM on Haikou devkit
SoC: PX30 <---- due to DISPLAY_BOARDINFO
DRAM: 2 GiB
PMIC: RK809 (on=0x40, off=0x00)
Core: 293 devices, 27 uclasses, devicetree: separate
MMC: mmc@ff370000: 1, mmc@ff390000: 0
Loading Environment from MMC... Reading from MMC(1)... OK
In: serial@ff030000
Out: serial@ff030000
Err: serial@ff030000
Model: Theobroma Systems PX30-uQ7 SoM on Haikou devkit
SoC: PX30 <----- due to DISPLAY_BOARDINFO_LATE
Net: eth0: ethernet@ff360000
Signed-off-by: Quentin Schulz <quentin.sch...@cherry.de>
---
Tested on a PX30 Ringneck and PX30K Ringneck. Would be nice if anyone
had a device with a PX30S or any other variant so we could verify it
prints what it should :) Or maybe Kever knows :)?
PX30S has the same id with PX30 in byte 6.
For PX30, there should not have other variant now.
Thanks for the info.
Is there a way to differentiate PX30 from PX30S from the OTP maybe?
This is the code from vendor kernel for identify PX30 and PX30S:
drivers/soc/rockchip/rockchip-cpuinfo.c
rockchip_soc_id = ROCKCHIP_SOC_PX30;
#define PX30_DDR_GRF_BASE 0xFF630000
#define PX30_DDR_GRF_CON1 0x04
base = ioremap(PX30_DDR_GRF_BASE, SZ_4K);
if (base) {
unsigned int val = readl_relaxed(base +
PX30_DDR_GRF_CON1);
if (((val >> 14) & 0x03) == 0x03)
rockchip_soc_id = ROCKCHIP_SOC_PX30S;
iounmap(base);
}
Thanks,
- Kever
If not, do you want to show
PX30/PX30S
when byte 6 is 0x21?
Cheers,
Quentin
