AM62A SoC has multiple speed grades. Add function to delete non-relevant CPU frequency nodes, based on the information retrieved from hardware registers. Fastest grade's maximum frequency also depends on PMIC voltage,hence to simplify implementation use the smaller value.
Signed-off-by: Aparna Patra <a-pa...@ti.com> --- arch/arm/mach-k3/am62ax/am62a7_fdt.c | 14 +++++++++++ .../arm/mach-k3/include/mach/am62a_hardware.h | 23 +++++++++++++++++++ 2 files changed, 37 insertions(+) diff --git a/arch/arm/mach-k3/am62ax/am62a7_fdt.c b/arch/arm/mach-k3/am62ax/am62a7_fdt.c index 40833ca392..9526c5b255 100644 --- a/arch/arm/mach-k3/am62ax/am62a7_fdt.c +++ b/arch/arm/mach-k3/am62ax/am62a7_fdt.c @@ -81,6 +81,19 @@ static void fdt_fixup_thermal_zone_nodes_am62a(void *blob, int maxc) } } +static void fdt_fixup_cpu_freq_nodes_am62a(void *blob, int max_freq) +{ + if (max_freq >= 1250000000) + return; + if (max_freq <= 1000000000) { + fdt_del_node_path(blob, "/opp-table/opp-1250000000"); + fdt_del_node_path(blob, "/opp-table/opp-1400000000"); + } + if (max_freq <= 800000000) { + fdt_del_node_path(blob, "/opp-table/opp-1000000000"); + } +} + int ft_system_setup(void *blob, struct bd_info *bd) { fdt_fixup_cores_wdt_nodes_am62a(blob, k3_get_core_nr()); @@ -88,6 +101,7 @@ int ft_system_setup(void *blob, struct bd_info *bd) fdt_fixup_video_codec_nodes_am62a(blob, k3_has_video_codec()); fdt_fixup_canfd_nodes_am62a(blob, k3_has_canfd()); fdt_fixup_thermal_zone_nodes_am62a(blob, k3_get_max_temp()); + fdt_fixup_cpu_freq_nodes_am62a(blob, k3_get_a53_max_frequency()); fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000); fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x1800000); diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h index 0ec04a72f5..64e4a379fa 100644 --- a/arch/arm/mach-k3/include/mach/am62a_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h @@ -28,6 +28,8 @@ #define JTAG_DEV_VIDEO_CODEC_SHIFT 14 #define JTAG_DEV_DSS_MASK GENMASK(16, 13) #define JTAG_DEV_DSS_SHIFT 13 +#define JTAG_DEV_SPEED_MASK GENMASK(10, 6) +#define JTAG_DEV_SPEED_SHIFT 6 #define JTAG_DEV_TEMP_MASK GENMASK(5, 3) #define JTAG_DEV_TEMP_SHIFT 3 @@ -144,6 +146,27 @@ static inline int k3_get_max_temp(void) return JTAG_DEV_TEMP_EXTENDED_VALUE; } +static inline char k3_get_speed_grade(void) +{ + u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + u32 speed_grade = (dev_id & JTAG_DEV_SPEED_MASK) >> + JTAG_DEV_SPEED_SHIFT; + + return 'A' - 1 + speed_grade; +} + +static inline int k3_get_a53_max_frequency(void) +{ + if (k3_get_speed_grade() <= 'N') + return 800000000; + + else if (k3_get_speed_grade() <= 'R') + return 1000000000; + + else + return 1250000000; +} + #if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__) static const u32 put_device_ids[] = {}; -- 2.34.1