This fragment enables falcon boot for the am62x, 62a and 62p.
To have enough stack and heap space for loading kernel image as
FIT the memory map was modified by expanding stack + heap size, the
PRELOADED_BL33_BASE in ATF has to also be updated to 0x82000000 since
the kernel requires to be loaded at 2MiB aligned address along with
change changing K3_HW_CONFIG_BASE to 0x88000000 for the DT passed to
kernel.
Modified memory map for R5 SPL (modified addresses marked with *):
0x80000000 +-------------------------------+ Start of DDR
512KiB | ATF reserved memory space | CONFIG_K3_ATF_LOAD_ADDR*
0x80080000 +-------------------------------+
31.5MiB | Unused |
0x82000000 +-------------------------------+ PRELOADED_BL33_BASE* in ATF
| | CONFIG_SYS_LOAD_ADDR*
57MiB | Kernel + initramfs Image | CONFIG_SPL_LOAD_FIT_ADDRESS*
| |
0x85900000 +-------------------------------+
| |
| R5 U-Boot SPL Stack + Heap |
39MiB | (size defined by |
|SPL_STACK_R_MALLOC_SIMPLE_LEN*)|
| |
0x88000000 +-------------------------------+ CONFIG_SPL_STACK_R_ADDR*
| | K3_HW_CONFIG_BASE* in ATF
16MiB | Kernel DTB | CONFIG_SPL_PAYLOAD_ARGS_ADDR*
| |
0x89000000 +-------------------------------+
331MiB | Device Manager (DM) Load Addr |
0x9db00000 +-------------------------------+
12MiB | DM Reserved |
0x9e700000 +-------------------------------+
1MiB | Unused |
0x9e800000 +-------------------------------+ BL32_BASE in ATF
24MiB | OPTEE |
0xa0000000 +-------------------------------+ End of DDR (512MiB)
Signed-off-by: Anshul Dalal <ansh...@ti.com>
---
configs/am62x_r5_falcon.config | 38 ++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 configs/am62x_r5_falcon.config
diff --git a/configs/am62x_r5_falcon.config b/configs/am62x_r5_falcon.config
new file mode 100644
index 00000000000..c9bb8d68505
--- /dev/null
+++ b/configs/am62x_r5_falcon.config
@@ -0,0 +1,38 @@
+# Enable falcon mode
+CONFIG_SPL_OS_BOOT=y
+
+# We use envs for setting bootargs and optionally for
`falcon_(image|args)_file`
+CONFIG_SPL_ENV_SUPPORT=y
+
+# Perform FDT fixups from SPL
+CONFIG_OF_SYSTEM_SETUP=y
+
+# Enabling this causes issues with EMMC FS boot,
+# When enabled the SPL tries to detect FS on boot[01] hw partition which fails
+# since we need the raw tiboot3.bin there for the board to boot instead
+CONFIG_SUPPORT_EMMC_BOOT=n
+
+# Used as the 2MiB aligned load address for kernel
+CONFIG_SYS_LOAD_ADDR=0x82000000
+CONFIG_SPL_PAYLOAD_ARGS_ADDR=0x88000000
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x82000000
+CONFIG_SPL_STACK_R_ADDR=0x88000000
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2700000
+
+# We use the rootfs (i.e partition 2) for booting which is ext4 not FAT
+CONFIG_SYS_MMCSD_FS_BOOT_PARTITION=2
+CONFIG_SPL_FS_EXT4=y
+CONFIG_SPL_FS_FAT=n
+
+# Loading tispl_falcon instead of tispl which has fdt and A53 spl saves time
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="boot/tispl_falcon.bin"
+CONFIG_SPL_FS_LOAD_KERNEL_NAME="boot/fitImage"
+
+# Disabled to save space on the spl
+CONFIG_TI_K3_NAVSS_UDMA=n
+
+# During SPI boot, kernel and args are loaded from the eMMC or SD and not SPI,
+# therefore we don't actually make use of these config values.
+CONFIG_SYS_SPI_KERNEL_OFFS=0
+CONFIG_SYS_SPI_ARGS_OFFS=0
+CONFIG_SYS_SPI_ARGS_SIZE=0
--
2.49.0
