Add the device specific driver data, the device tree entry, and the
clock configuration.

Signed-off-by: Jonathan Currier <dullf...@yahoo.com>
---
 arch/arm/dts/imxrt1170-evk.dts              | 28 +++++++++++++++++++++
 arch/arm/dts/imxrt1170.dtsi                 | 13 ++++++++++
 drivers/clk/imx/clk-imxrt1170.c             |  9 +++++++
 drivers/spi/nxp_fspi.c                      | 10 ++++++++
 include/dt-bindings/clock/imxrt1170-clock.h |  4 ++-
 5 files changed, 63 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/imxrt1170-evk.dts b/arch/arm/dts/imxrt1170-evk.dts
index 0d8e7016860..354352477c7 100644
--- a/arch/arm/dts/imxrt1170-evk.dts
+++ b/arch/arm/dts/imxrt1170-evk.dts
@@ -234,6 +234,34 @@
                                        (IMX_PAD_SION | 8)      /* SEMC_DQS */
                        >;
                };
+
+               pinctrl_flexspi1: flexspi1grp {
+                       fsl,pins = <
+                               IOMUXC_GPIO_SD_B2_05_FLEXSPI1_A_DQS     0xa
+                               IOMUXC_GPIO_SD_B2_06_FLEXSPI1_A_SS0_B   0xa
+                               IOMUXC_GPIO_SD_B2_07_FLEXSPI1_A_SCLK    0xa
+                               IOMUXC_GPIO_SD_B2_08_FLEXSPI1_A_DATA00  0xa
+                               IOMUXC_GPIO_SD_B2_09_FLEXSPI1_A_DATA01  0xa
+                               IOMUXC_GPIO_SD_B2_10_FLEXSPI1_A_DATA02  0xa
+                               IOMUXC_GPIO_SD_B2_11_FLEXSPI1_A_DATA03  0xa
+                       >;
+               };
+       };
+};
+
+&flexspi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexspi1>;
+       status = "okay";
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               spi-max-frequency = <250000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
        };
 };
 
diff --git a/arch/arm/dts/imxrt1170.dtsi b/arch/arm/dts/imxrt1170.dtsi
index 2de775f043f..08665eaf06a 100644
--- a/arch/arm/dts/imxrt1170.dtsi
+++ b/arch/arm/dts/imxrt1170.dtsi
@@ -246,6 +246,19 @@
                        #interrupt-cells = <2>;
                };
 
+               flexspi1: spi@400cc000 {
+                       compatible = "nxp,imxrt1170-fspi";
+                       reg = <0x400cc000 0x800>, <0x30000000 0x10000000>;
+                       reg-names = "fspi_base", "fspi_mmap";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <130>;
+                       clocks = <&clks IMXRT1170_CLK_DUMMY>,
+                               <&clks IMXRT1170_CLK_FLEXSPI1>;
+                       clock-names = "fspi_en", "fspi";
+                       status = "disabled";
+               };
+
                gpt1: gpt1@400ec000 {
                        compatible = "fsl,imxrt-gpt";
                        reg = <0x400ec000 0x4000>;
diff --git a/drivers/clk/imx/clk-imxrt1170.c b/drivers/clk/imx/clk-imxrt1170.c
index 88a294f4165..440fb0b001d 100644
--- a/drivers/clk/imx/clk-imxrt1170.c
+++ b/drivers/clk/imx/clk-imxrt1170.c
@@ -105,6 +105,8 @@ static const char * const usdhc1_sels[] = {"rcosc48M_div2", 
"osc", "rcosc400M",
 "pll2_pfd2", "pll2_pfd0", "pll1_div5", "pll_arm"};
 static const char * const semc_sels[] = {"rcosc48M_div2", "osc", "rcosc400M", 
"rcosc16M",
 "pll1_div5", "pll2_sys", "pll2_pfd2", "pll3_pfd0"};
+static const char * const flexspi1_sels[] = {"rcosc48M_div2", "osc", 
"rcosc400M", "rcosc16M",
+"pll3_pdf0", "pll2_clk", "pll2_pfd2", "pll3_clk"};
 
 static int imxrt1170_clk_probe(struct udevice *dev)
 {
@@ -163,6 +165,13 @@ static int imxrt1170_clk_probe(struct udevice *dev)
               imx_clk_divider("lpuart1", "lpuart1_sel",
                               base + (25 * 0x80), 0, 8));
 
+       clk_dm(IMXRT1170_CLK_FLEXSPI1_SEL,
+              imx_clk_mux("flexspi1_sel", base + (20 * 0x80), 8, 3,
+                          flexspi1_sels, ARRAY_SIZE(flexspi1_sels)));
+       clk_dm(IMXRT1170_CLK_FLEXSPI1,
+              imx_clk_divider("flexspi1", "flexspi1_sel",
+                              base + (20 * 0x80), 0, 8));
+
        clk_dm(IMXRT1170_CLK_USDHC1_SEL,
               imx_clk_mux("usdhc1_sel", base + (58 * 0x80), 8, 3,
                           usdhc1_sels, ARRAY_SIZE(usdhc1_sels)));
diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c
index 3d0f659ecb2..95ad7fcff7f 100644
--- a/drivers/spi/nxp_fspi.c
+++ b/drivers/spi/nxp_fspi.c
@@ -328,6 +328,15 @@ static struct nxp_fspi_devtype_data imx8mm_data = {
        .little_endian = true,  /* little-endian    */
 };
 
+static struct nxp_fspi_devtype_data imxrt1170_data = {
+       .rxfifo = SZ_256,
+       .txfifo = SZ_256,
+       .ahb_buf_size = SZ_4K,
+       .quirks = 0,
+       .lut_num = 16,
+       .little_endian = true,
+};
+
 struct nxp_fspi {
        struct udevice *dev;
        void __iomem *iobase;
@@ -1061,6 +1070,7 @@ static const struct udevice_id nxp_fspi_ids[] = {
        { .compatible = "nxp,lx2160a-fspi", .data = (ulong)&lx2160a_data, },
        { .compatible = "nxp,imx8mm-fspi", .data = (ulong)&imx8mm_data, },
        { .compatible = "nxp,imx8mp-fspi", .data = (ulong)&imx8mm_data, },
+       { .compatible = "nxp,imxrt1170-fspi", .data = (ulong)&imxrt1170_data, },
        { }
 };
 
diff --git a/include/dt-bindings/clock/imxrt1170-clock.h 
b/include/dt-bindings/clock/imxrt1170-clock.h
index 8ab8018a15e..d3d21cf310d 100644
--- a/include/dt-bindings/clock/imxrt1170-clock.h
+++ b/include/dt-bindings/clock/imxrt1170-clock.h
@@ -43,6 +43,8 @@
 #define IMXRT1170_CLK_GPT1                     33
 #define IMXRT1170_CLK_SEMC_SEL                 34
 #define IMXRT1170_CLK_SEMC                     35
-#define IMXRT1170_CLK_END                      36
+#define IMXRT1170_CLK_FLEXSPI1_SEL             36
+#define IMXRT1170_CLK_FLEXSPI1                 37
+#define IMXRT1170_CLK_END                      38
 
 #endif /* __DT_BINDINGS_CLOCK_IMXRT1170_H */
-- 
2.45.3

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