Hi Heiko, On 2025-04-14 22:00, Heiko Stuebner wrote: > From: Xuhui Lin <xuhui....@rock-chips.com> > > The Rockchip RK3576 is a ARM-based SoC with quad-core Cortex-A72 > and quad-core Cortex-A53 including 6TOPS NPU, Mali-G52 MC3, HDMI Out, > DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, UFS, > USB OTG 3.0, Type-C, USB 2.0, PCIe 2.1, SATA 3, Ethernet, SDIO3.0, I2C, > UART, SPI, GPIO and PWM. > > Add arch core support for it. > > Signed-off-by: Xuhui Lin <xuhui....@rock-chips.com> > [adapted for mainline u-boot] > Signed-off-by: Heiko Stuebner <he...@sntech.de> > --- > arch/arm/dts/rk3576-u-boot.dtsi | 131 +++++++++++++++ > arch/arm/include/asm/arch-rk3576/boot0.h | 11 ++ > arch/arm/include/asm/arch-rk3576/gpio.h | 11 ++ > arch/arm/mach-rockchip/Kconfig | 51 ++++++ > arch/arm/mach-rockchip/Makefile | 1 + > arch/arm/mach-rockchip/rk3576/Kconfig | 15 ++ > arch/arm/mach-rockchip/rk3576/Makefile | 9 + > arch/arm/mach-rockchip/rk3576/clk_rk3576.c | 18 ++ > arch/arm/mach-rockchip/rk3576/rk3576.c | 155 ++++++++++++++++++ > arch/arm/mach-rockchip/rk3576/syscon_rk3576.c | 22 +++ > arch/arm/mach-rockchip/sdram.c | 1 + > doc/board/rockchip/rockchip.rst | 9 + > include/configs/rk3576_common.h | 45 +++++ > 13 files changed, 479 insertions(+) > create mode 100644 arch/arm/dts/rk3576-u-boot.dtsi > create mode 100644 arch/arm/include/asm/arch-rk3576/boot0.h > create mode 100644 arch/arm/include/asm/arch-rk3576/gpio.h > create mode 100644 arch/arm/mach-rockchip/rk3576/Kconfig > create mode 100644 arch/arm/mach-rockchip/rk3576/Makefile > create mode 100644 arch/arm/mach-rockchip/rk3576/clk_rk3576.c > create mode 100644 arch/arm/mach-rockchip/rk3576/rk3576.c > create mode 100644 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c > create mode 100644 include/configs/rk3576_common.h >
[snip] > diff --git a/include/configs/rk3576_common.h b/include/configs/rk3576_common.h > new file mode 100644 > index 00000000000..90ea62cb9ca > --- /dev/null > +++ b/include/configs/rk3576_common.h > @@ -0,0 +1,45 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +/* > + * (C) Copyright 2024 Rockchip Electronics Co., Ltd > + */ > + > +#ifndef __CONFIG_RK3576_COMMON_H > +#define __CONFIG_RK3576_COMMON_H > + > +#define CFG_CPUID_OFFSET 0xa > + > +#include "rockchip-common.h" > + > +#define CFG_IRAM_BASE 0x3ff80000 > + > +#define CFG_SYS_SDRAM_BASE 0x40000000 > +/* Used by board_get_usable_ram_top(), space below the 4G address boundary */ > +#define SDRAM_MAX_SIZE (SZ_4G - CFG_SYS_SDRAM_BASE) > + > +#ifndef CONFIG_XPL_BUILD I know that I probably suggested adding this XPL_BUILD condition in v1, however after seeing similar wrapper being dropped in FUKAUMI Naoki's "rockchip: Add boot from USB OTG port" series [1] I am no longer sure it should be here and I ended up dropping it for RK3528. Regardless, this is: Reviewed-by: Jonas Karlman <jo...@kwiboo.se> [1] https://patchwork.ozlabs.org/cover/2045428/ Regards, Jonas > + > +#ifndef ROCKCHIP_DEVICE_SETTINGS > +#define ROCKCHIP_DEVICE_SETTINGS > +#endif > + > +#define ENV_MEM_LAYOUT_SETTINGS \ > + "scriptaddr=0x40c00000\0" \ > + "script_offset_f=0xffe000\0" \ > + "script_size_f=0x2000\0" \ > + "pxefile_addr_r=0x40e00000\0" \ > + "kernel_addr_r=0x42000000\0" \ > + "kernel_comp_addr_r=0x4a000000\0" \ > + "fdt_addr_r=0x52000000\0" \ > + "fdtoverlay_addr_r=0x52100000\0" \ > + "ramdisk_addr_r=0x52180000\0" \ > + "kernel_comp_size=0x8000000\0" > + > +#define CFG_EXTRA_ENV_SETTINGS \ > + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ > + ENV_MEM_LAYOUT_SETTINGS \ > + ROCKCHIP_DEVICE_SETTINGS \ > + "boot_targets=" BOOT_TARGETS "\0" > + > +#endif /* CONFIG_XPL_BUILD */ > + > +#endif /* __CONFIG_RK3576_COMMON_H */
