On 07/04/2025 18:59, Stephan Gerhold wrote:
The workaround for the "PSCI bug" on DragonBoard 410c implemented in arch/arm/mach-snapdragon/include/mach/boot0.h clobbers the x0 register by storing the CurrentEL in there. When running in EL1, the mode switch sequence implemented there later clears the register again, but this is skipped when U-Boot is booted in EL2.This causes crashes in the mach-snapdragon board_fdt_blob_setup() later, because the invalid address stored in x0 gets dereferenced to check if it points to a valid DTB. We can't rely on having a valid values in the CPU registers for the first stage bootloader configuration on DB410c, and nothing would place a DTB there anyway. Skip selecting the SAVE_PREV_BL_FDT_ADDR option for the boot0 hook case to avoid crashing with the clobbered register value. Fixes: 059d526af312 ("mach-snapdragon: generalise board support") Signed-off-by: Stephan Gerhold <stephan.gerh...@linaro.org> --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 63aefeda9575fec8fc57194358df0819397d088e..af3d39196ee4fb201d4aad20a882bbbb39263396 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1115,7 +1115,7 @@ config ARCH_SNAPDRAGON select SPMI select BOARD_LATE_INIT select OF_BOARD - select SAVE_PREV_BL_FDT_ADDR + select SAVE_PREV_BL_FDT_ADDR if !ENABLE_ARM_SOC_BOOT0_HOOK select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK select SYSRESET select SYSRESET_PSCI
Good catch Reviewed-by: Neil Armstrong <neil.armstr...@linaro.org>
