Use the name "mr" since we are referring to timer mode register.
Signed-off-by: Zixun LI <ad...@hifiphile.com>
---
arch/arm/mach-at91/include/mach/at91_wdt.h | 2 +-
drivers/watchdog/at91sam9_wdt.c | 8 ++++----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-at91/include/mach/at91_wdt.h
b/arch/arm/mach-at91/include/mach/at91_wdt.h
index 78ad0453fd9..a5accbae521 100644
--- a/arch/arm/mach-at91/include/mach/at91_wdt.h
+++ b/arch/arm/mach-at91/include/mach/at91_wdt.h
@@ -21,7 +21,7 @@
struct at91_wdt_priv {
void __iomem *regs;
- u32 regval;
+ u32 mr;
};
#endif
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index c809a8936b8..dab7b6a9b8c 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -60,11 +60,11 @@ static int at91_wdt_start(struct udevice *dev, u64
timeout_ms, ulong flags)
* Since WDV is a 12-bit counter, the maximum period is
* 4096 / 256 = 16 seconds.
*/
- priv->regval = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */
+ priv->mr = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */
| AT91_WDT_MR_WDDBGHLT /* disabled in debug mode */
| AT91_WDT_MR_WDD(0xfff) /* restart at any time */
| AT91_WDT_MR_WDV(ticks); /* timer value */
- writel(priv->regval, priv->regs + AT91_WDT_MR);
+ writel(priv->mr, priv->regs + AT91_WDT_MR);
return 0;
}
@@ -74,8 +74,8 @@ static int at91_wdt_stop(struct udevice *dev)
struct at91_wdt_priv *priv = dev_get_priv(dev);
/* Disable Watchdog Timer */
- priv->regval |= AT91_WDT_MR_WDDIS;
- writel(priv->regval, priv->regs + AT91_WDT_MR);
+ priv->mr |= AT91_WDT_MR_WDDIS;
+ writel(priv->mr, priv->regs + AT91_WDT_MR);
return 0;
}
--
2.49.0
