Enable OF_UPSTREAM flag for STM32MPF4 platforms.
Signed-off-by: Patrice Chotard <patrice.chot...@foss.st.com>
---
arch/arm/dts/Makefile | 4 -
arch/arm/dts/stm32429i-eval.dts | 284 ---------
arch/arm/dts/stm32f4-pinctrl.dtsi | 447 ---------------
arch/arm/dts/stm32f429-disco.dts | 190 -------
arch/arm/dts/stm32f429-pinctrl.dtsi | 55 --
arch/arm/dts/stm32f429.dtsi | 758 -------------------------
arch/arm/dts/stm32f469-disco.dts | 213 -------
arch/arm/dts/stm32f469-pinctrl.dtsi | 55 --
arch/arm/dts/stm32f469.dtsi | 18 -
arch/arm/mach-stm32/Kconfig | 1 +
configs/stm32f429-discovery_defconfig | 2 +-
configs/stm32f429-evaluation_defconfig | 2 +-
configs/stm32f469-discovery_defconfig | 2 +-
13 files changed, 4 insertions(+), 2027 deletions(-)
delete mode 100644 arch/arm/dts/stm32429i-eval.dts
delete mode 100644 arch/arm/dts/stm32f4-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32f429-disco.dts
delete mode 100644 arch/arm/dts/stm32f429-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32f429.dtsi
delete mode 100644 arch/arm/dts/stm32f469-disco.dts
delete mode 100644 arch/arm/dts/stm32f469-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32f469.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2a3c12431c5..01b3bd7e3ac 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -519,10 +519,6 @@ dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb
dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb
-dtb-$(CONFIG_STM32F4) += stm32f429-disco.dtb \
- stm32429i-eval.dtb \
- stm32f469-disco.dtb
-
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-inet-3f.dtb \
sun4i-a10-inet-3w.dtb
diff --git a/arch/arm/dts/stm32429i-eval.dts b/arch/arm/dts/stm32429i-eval.dts
deleted file mode 100644
index 592b182c1aa..00000000000
--- a/arch/arm/dts/stm32429i-eval.dts
+++ /dev/null
@@ -1,284 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2015, STMicroelectronics - All Rights Reserved
- * Author: Maxime Coquelin <mcoquelin.st...@gmail.com> for STMicroelectronics.
- */
-
-/dts-v1/;
-#include "stm32f429.dtsi"
-#include "stm32f429-pinctrl.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "STMicroelectronics STM32429i-EVAL board";
- compatible = "st,stm32429i-eval", "st,stm32f429";
-
- chosen {
- bootargs = "root=/dev/ram";
- stdout-path = "serial0:115200n8";
- };
-
- memory@00000000 {
- device_type = "memory";
- reg = <0x00000000 0x2000000>;
- };
-
- aliases {
- serial0 = &usart1;
- };
-
- clocks {
- clk_ext_camera: clk-ext-camera {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- };
- };
-
- soc {
- dma-ranges = <0xc0000000 0x0 0x10000000>;
- };
-
- vdda: regulator-vdda {
- compatible = "regulator-fixed";
- regulator-name = "vdda";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vref: regulator-vref {
- compatible = "regulator-fixed";
- regulator-name = "vref";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vdd_panel: vdd-panel {
- compatible = "regulator-fixed";
- regulator-name = "vdd_panel";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- leds {
- compatible = "gpio-leds";
- led-green {
- gpios = <&gpiog 6 1>;
- linux,default-trigger = "heartbeat";
- };
- led-orange {
- gpios = <&gpiog 7 1>;
- };
- led-red {
- gpios = <&gpiog 10 1>;
- };
- led-blue {
- gpios = <&gpiog 12 1>;
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- autorepeat;
- button@0 {
- label = "Wake up";
- linux,code = <KEY_WAKEUP>;
- gpios = <&gpioa 0 0>;
- };
- button@1 {
- label = "Tamper";
- linux,code = <KEY_RESTART>;
- gpios = <&gpioc 13 0>;
- };
- };
-
- usbotg_hs_phy: usbphy {
- #phy-cells = <0>;
- compatible = "usb-nop-xceiv";
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHSULPI)>;
- clock-names = "main_clk";
- };
-
- panel_rgb: panel-rgb {
- compatible = "ampire,am-480272h3tmqw-t01h";
- power-supply = <&vdd_panel>;
- status = "okay";
- port {
- panel_in_rgb: endpoint {
- remote-endpoint = <<dc_out_rgb>;
- };
- };
- };
-
- mmc_vcard: mmc_vcard {
- compatible = "regulator-fixed";
- regulator-name = "mmc_vcard";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-};
-
-&adc {
- pinctrl-names = "default";
- pinctrl-0 = <&adc3_in8_pin>;
- vdda-supply = <&vdda>;
- vref-supply = <&vref>;
- status = "okay";
- adc3: adc@200 {
- st,adc-channels = <8>;
- status = "okay";
- };
-};
-
-&clk_hse {
- clock-frequency = <25000000>;
-};
-
-&crc {
- status = "okay";
-};
-
-&dcmi {
- status = "okay";
-
- port {
- dcmi_0: endpoint {
- remote-endpoint = <&ov2640_0>;
- bus-width = <8>;
- hsync-active = <0>;
- vsync-active = <0>;
- pclk-sample = <1>;
- };
- };
-};
-
-&i2c1 {
- pinctrl-0 = <&i2c1_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- ov2640: camera@30 {
- compatible = "ovti,ov2640";
- reg = <0x30>;
- resetb-gpios = <&stmpegpio 2 GPIO_ACTIVE_HIGH>;
- pwdn-gpios = <&stmpegpio 0 GPIO_ACTIVE_LOW>;
- clocks = <&clk_ext_camera>;
- clock-names = "xvclk";
- status = "okay";
-
- port {
- ov2640_0: endpoint {
- remote-endpoint = <&dcmi_0>;
- };
- };
- };
-
- stmpe1600: stmpe1600@42 {
- compatible = "st,stmpe1600";
- reg = <0x42>;
- interrupts = <8 3>;
- interrupt-parent = <&gpioi>;
- interrupt-controller;
- wakeup-source;
-
- stmpegpio: stmpe_gpio {
- compatible = "st,stmpe-gpio";
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
-};
-
-&iwdg {
- status = "okay";
- timeout-sec = <32>;
-};
-
-<dc {
- status = "okay";
- pinctrl-0 = <<dc_pins_a>;
- pinctrl-names = "default";
-
- port {
- ltdc_out_rgb: endpoint {
- remote-endpoint = <&panel_in_rgb>;
- };
- };
-};
-
-&mac {
- status = "okay";
- pinctrl-0 = <ðernet_mii>;
- pinctrl-names = "default";
- phy-mode = "mii";
- phy-handle = <&phy1>;
- mdio0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- phy1: ethernet-phy@1 {
- reg = <1>;
- };
- };
-};
-
-&rtc {
- status = "okay";
-};
-
-&sdio {
- status = "okay";
- vmmc-supply = <&mmc_vcard>;
- cd-gpios = <&stmpegpio 15 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default", "opendrain";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_pins_od>;
- bus-width = <4>;
- max-frequency = <12500000>;
-};
-
-&timers1 {
- status = "okay";
-
- pwm {
- pinctrl-0 = <&pwm1_pins>;
- pinctrl-names = "default";
- status = "okay";
- };
-
- timer@0 {
- status = "okay";
- };
-};
-
-&timers3 {
- status = "okay";
-
- pwm {
- pinctrl-0 = <&pwm3_pins>;
- pinctrl-names = "default";
- status = "okay";
- };
-
- timer@2 {
- status = "okay";
- };
-};
-
-&usart1 {
- pinctrl-0 = <&usart1_pins_a>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&usbotg_hs {
- dr_mode = "host";
- phys = <&usbotg_hs_phy>;
- phy-names = "usb2-phy";
- pinctrl-0 = <&usbotg_hs_pins_a>;
- pinctrl-names = "default";
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32f4-pinctrl.dtsi
b/arch/arm/dts/stm32f4-pinctrl.dtsi
deleted file mode 100644
index 0adc41b2a46..00000000000
--- a/arch/arm/dts/stm32f4-pinctrl.dtsi
+++ /dev/null
@@ -1,447 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2017 - Alexandre Torgue <alexandre.tor...@st.com>
- *
- */
-
-#include <dt-bindings/pinctrl/stm32-pinfunc.h>
-#include <dt-bindings/mfd/stm32f4-rcc.h>
-
-/ {
- soc {
- pinctrl: pinctrl@40020000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x40020000 0x3000>;
- interrupt-parent = <&exti>;
- st,syscfg = <&syscfg 0x8>;
- pins-are-numbered;
-
- gpioa: gpio@40020000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x0 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>;
- st,bank-name = "GPIOA";
- };
-
- gpiob: gpio@40020400 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x400 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>;
- st,bank-name = "GPIOB";
- };
-
- gpioc: gpio@40020800 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x800 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>;
- st,bank-name = "GPIOC";
- };
-
- gpiod: gpio@40020c00 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0xc00 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOD)>;
- st,bank-name = "GPIOD";
- };
-
- gpioe: gpio@40021000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x1000 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOE)>;
- st,bank-name = "GPIOE";
- };
-
- gpiof: gpio@40021400 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x1400 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOF)>;
- st,bank-name = "GPIOF";
- };
-
- gpiog: gpio@40021800 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x1800 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOG)>;
- st,bank-name = "GPIOG";
- };
-
- gpioh: gpio@40021c00 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x1c00 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOH)>;
- st,bank-name = "GPIOH";
- };
-
- gpioi: gpio@40022000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x2000 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOI)>;
- st,bank-name = "GPIOI";
- };
-
- gpioj: gpio@40022400 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x2400 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOJ)>;
- st,bank-name = "GPIOJ";
- };
-
- gpiok: gpio@40022800 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x2800 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOK)>;
- st,bank-name = "GPIOK";
- };
-
- usart1_pins_a: usart1-0 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 9, AF7)>;
/* USART1_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 10, AF7)>;
/* USART1_RX */
- bias-disable;
- };
- };
-
- usart3_pins_a: usart3-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 10, AF7)>;
/* USART3_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 11, AF7)>;
/* USART3_RX */
- bias-disable;
- };
- };
-
- usbotg_fs_pins_a: usbotg-fs-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 10, AF10)>,
/* OTG_FS_ID */
- <STM32_PINMUX('A', 11, AF10)>,
/* OTG_FS_DM */
- <STM32_PINMUX('A', 12, AF10)>;
/* OTG_FS_DP */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- };
-
- usbotg_fs_pins_b: usbotg-fs-1 {
- pins {
- pinmux = <STM32_PINMUX('B', 12, AF12)>,
/* OTG_HS_ID */
- <STM32_PINMUX('B', 14, AF12)>,
/* OTG_HS_DM */
- <STM32_PINMUX('B', 15, AF12)>;
/* OTG_HS_DP */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- };
-
- usbotg_hs_pins_a: usbotg-hs-0 {
- pins {
- pinmux = <STM32_PINMUX('H', 4, AF10)>,
/* OTG_HS_ULPI_NXT*/
- <STM32_PINMUX('I', 11, AF10)>,
/* OTG_HS_ULPI_DIR */
- <STM32_PINMUX('C', 0, AF10)>,
/* OTG_HS_ULPI_STP */
- <STM32_PINMUX('A', 5, AF10)>,
/* OTG_HS_ULPI_CK */
- <STM32_PINMUX('A', 3, AF10)>,
/* OTG_HS_ULPI_D0 */
- <STM32_PINMUX('B', 0, AF10)>,
/* OTG_HS_ULPI_D1 */
- <STM32_PINMUX('B', 1, AF10)>,
/* OTG_HS_ULPI_D2 */
- <STM32_PINMUX('B', 10, AF10)>,
/* OTG_HS_ULPI_D3 */
- <STM32_PINMUX('B', 11, AF10)>,
/* OTG_HS_ULPI_D4 */
- <STM32_PINMUX('B', 12, AF10)>,
/* OTG_HS_ULPI_D5 */
- <STM32_PINMUX('B', 13, AF10)>,
/* OTG_HS_ULPI_D6 */
- <STM32_PINMUX('B', 5, AF10)>;
/* OTG_HS_ULPI_D7 */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- };
-
- ethernet_mii: mii-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 13, AF11)>,
/* ETH_MII_TXD0_ETH_RMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>,
/* ETH_MII_TXD1_ETH_RMII_TXD1 */
- <STM32_PINMUX('C', 2, AF11)>,
/* ETH_MII_TXD2 */
- <STM32_PINMUX('B', 8, AF11)>,
/* ETH_MII_TXD3 */
- <STM32_PINMUX('C', 3, AF11)>,
/* ETH_MII_TX_CLK */
- <STM32_PINMUX('G', 11,AF11)>,
/* ETH_MII_TX_EN_ETH_RMII_TX_EN */
- <STM32_PINMUX('A', 2, AF11)>,
/* ETH_MDIO */
- <STM32_PINMUX('C', 1, AF11)>,
/* ETH_MDC */
- <STM32_PINMUX('A', 1, AF11)>,
/* ETH_MII_RX_CLK_ETH_RMII_REF_CLK */
- <STM32_PINMUX('A', 7, AF11)>,
/* ETH_MII_RX_DV_ETH_RMII_CRS_DV */
- <STM32_PINMUX('C', 4, AF11)>,
/* ETH_MII_RXD0_ETH_RMII_RXD0 */
- <STM32_PINMUX('C', 5, AF11)>,
/* ETH_MII_RXD1_ETH_RMII_RXD1 */
- <STM32_PINMUX('H', 6, AF11)>,
/* ETH_MII_RXD2 */
- <STM32_PINMUX('H', 7, AF11)>;
/* ETH_MII_RXD3 */
- slew-rate = <2>;
- };
- };
-
- adc3_in8_pin: adc-200 {
- pins {
- pinmux = <STM32_PINMUX('F', 10,
ANALOG)>;
- };
- };
-
- pwm1_pins: pwm1-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 8, AF1)>,
/* TIM1_CH1 */
- <STM32_PINMUX('B', 13, AF1)>,
/* TIM1_CH1N */
- <STM32_PINMUX('B', 12, AF1)>;
/* TIM1_BKIN */
- };
- };
-
- pwm3_pins: pwm3-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 4, AF2)>,
/* TIM3_CH1 */
- <STM32_PINMUX('B', 5, AF2)>;
/* TIM3_CH2 */
- };
- };
-
- i2c1_pins: i2c1-0 {
- pins {
- pinmux = <STM32_PINMUX('B', 9, AF4)>,
/* I2C1_SDA */
- <STM32_PINMUX('B', 6, AF4)>;
/* I2C1_SCL */
- bias-disable;
- drive-open-drain;
- slew-rate = <3>;
- };
- };
-
- ltdc_pins_a: ltdc-0 {
- pins {
- pinmux = <STM32_PINMUX('I', 12, AF14)>,
/* LCD_HSYNC */
- <STM32_PINMUX('I', 13, AF14)>,
/* LCD_VSYNC */
- <STM32_PINMUX('I', 14, AF14)>,
/* LCD_CLK */
- <STM32_PINMUX('I', 15, AF14)>,
/* LCD_R0 */
- <STM32_PINMUX('J', 0, AF14)>,
/* LCD_R1 */
- <STM32_PINMUX('J', 1, AF14)>,
/* LCD_R2 */
- <STM32_PINMUX('J', 2, AF14)>,
/* LCD_R3 */
- <STM32_PINMUX('J', 3, AF14)>,
/* LCD_R4 */
- <STM32_PINMUX('J', 4, AF14)>,
/* LCD_R5 */
- <STM32_PINMUX('J', 5, AF14)>,
/* LCD_R6*/
- <STM32_PINMUX('J', 6, AF14)>,
/* LCD_R7 */
- <STM32_PINMUX('J', 7, AF14)>,
/* LCD_G0 */
- <STM32_PINMUX('J', 8, AF14)>,
/* LCD_G1 */
- <STM32_PINMUX('J', 9, AF14)>,
/* LCD_G2 */
- <STM32_PINMUX('J', 10, AF14)>,
/* LCD_G3 */
- <STM32_PINMUX('J', 11, AF14)>,
/* LCD_G4 */
- <STM32_PINMUX('J', 12, AF14)>,
/* LCD_B0 */
- <STM32_PINMUX('J', 13, AF14)>,
/* LCD_B1 */
- <STM32_PINMUX('J', 14, AF14)>,
/* LCD_B2 */
- <STM32_PINMUX('J', 15, AF14)>,
/* LCD_B3*/
- <STM32_PINMUX('K', 0, AF14)>,
/* LCD_G5 */
- <STM32_PINMUX('K', 1, AF14)>,
/* LCD_G6 */
- <STM32_PINMUX('K', 2, AF14)>,
/* LCD_G7 */
- <STM32_PINMUX('K', 3, AF14)>,
/* LCD_B4 */
- <STM32_PINMUX('K', 4, AF14)>,
/* LCD_B5 */
- <STM32_PINMUX('K', 5, AF14)>,
/* LCD_B6 */
- <STM32_PINMUX('K', 6, AF14)>,
/* LCD_B7 */
- <STM32_PINMUX('K', 7, AF14)>;
/* LCD_DE */
- slew-rate = <2>;
- };
- };
-
- ltdc_pins_b: ltdc-1 {
- pins {
- pinmux = <STM32_PINMUX('C', 6, AF14)>,
- /* LCD_HSYNC */
- <STM32_PINMUX('A', 4, AF14)>,
- /* LCD_VSYNC */
- <STM32_PINMUX('G', 7, AF14)>,
- /* LCD_CLK */
- <STM32_PINMUX('C', 10, AF14)>,
- /* LCD_R2 */
- <STM32_PINMUX('B', 0, AF9)>,
- /* LCD_R3 */
- <STM32_PINMUX('A', 11, AF14)>,
- /* LCD_R4 */
- <STM32_PINMUX('A', 12, AF14)>,
- /* LCD_R5 */
- <STM32_PINMUX('B', 1, AF9)>,
- /* LCD_R6*/
- <STM32_PINMUX('G', 6, AF14)>,
- /* LCD_R7 */
- <STM32_PINMUX('A', 6, AF14)>,
- /* LCD_G2 */
- <STM32_PINMUX('G', 10, AF9)>,
- /* LCD_G3 */
- <STM32_PINMUX('B', 10, AF14)>,
- /* LCD_G4 */
- <STM32_PINMUX('D', 6, AF14)>,
- /* LCD_B2 */
- <STM32_PINMUX('G', 11, AF14)>,
- /* LCD_B3*/
- <STM32_PINMUX('B', 11, AF14)>,
- /* LCD_G5 */
- <STM32_PINMUX('C', 7, AF14)>,
- /* LCD_G6 */
- <STM32_PINMUX('D', 3, AF14)>,
- /* LCD_G7 */
- <STM32_PINMUX('G', 12, AF9)>,
- /* LCD_B4 */
- <STM32_PINMUX('A', 3, AF14)>,
- /* LCD_B5 */
- <STM32_PINMUX('B', 8, AF14)>,
- /* LCD_B6 */
- <STM32_PINMUX('B', 9, AF14)>,
- /* LCD_B7 */
- <STM32_PINMUX('F', 10, AF14)>;
- /* LCD_DE */
- slew-rate = <2>;
- };
- };
-
- spi5_pins: spi5-0 {
- pins1 {
- pinmux = <STM32_PINMUX('F', 7, AF5)>,
- /* SPI5_CLK */
- <STM32_PINMUX('F', 9, AF5)>;
- /* SPI5_MOSI */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('F', 8, AF5)>;
- /* SPI5_MISO */
- bias-disable;
- };
- };
-
- i2c3_pins: i2c3-0 {
- pins {
- pinmux = <STM32_PINMUX('C', 9, AF4)>,
- /* I2C3_SDA */
- <STM32_PINMUX('A', 8, AF4)>;
- /* I2C3_SCL */
- bias-disable;
- drive-open-drain;
- slew-rate = <3>;
- };
- };
-
- dcmi_pins: dcmi-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 4, AF13)>,
/* DCMI_HSYNC */
- <STM32_PINMUX('B', 7, AF13)>,
/* DCMI_VSYNC */
- <STM32_PINMUX('A', 6, AF13)>,
/* DCMI_PIXCLK */
- <STM32_PINMUX('C', 6, AF13)>,
/* DCMI_D0 */
- <STM32_PINMUX('C', 7, AF13)>,
/* DCMI_D1 */
- <STM32_PINMUX('C', 8, AF13)>,
/* DCMI_D2 */
- <STM32_PINMUX('C', 9, AF13)>,
/* DCMI_D3 */
- <STM32_PINMUX('C', 11, AF13)>,
/*DCMI_D4 */
- <STM32_PINMUX('D', 3, AF13)>,
/* DCMI_D5 */
- <STM32_PINMUX('B', 8, AF13)>,
/* DCMI_D6 */
- <STM32_PINMUX('E', 6, AF13)>,
/* DCMI_D7 */
- <STM32_PINMUX('C', 10, AF13)>,
/* DCMI_D8 */
- <STM32_PINMUX('C', 12, AF13)>,
/* DCMI_D9 */
- <STM32_PINMUX('D', 6, AF13)>,
/* DCMI_D10 */
- <STM32_PINMUX('D', 2, AF13)>;
/* DCMI_D11 */
- bias-disable;
- drive-push-pull;
- slew-rate = <3>;
- };
- };
-
- sdio_pins: sdio-pins-0 {
- pins {
- pinmux = <STM32_PINMUX('C', 8, AF12)>,
/* SDIO_D0 */
- <STM32_PINMUX('C', 9, AF12)>,
/* SDIO_D1 */
- <STM32_PINMUX('C', 10, AF12)>,
/* SDIO_D2 */
- <STM32_PINMUX('C', 11, AF12)>,
/* SDIO_D3 */
- <STM32_PINMUX('C', 12, AF12)>,
/* SDIO_CK */
- <STM32_PINMUX('D', 2, AF12)>;
/* SDIO_CMD */
- drive-push-pull;
- slew-rate = <2>;
- };
- };
-
- sdio_pins_od: sdio-pins-od-0 {
- pins1 {
- pinmux = <STM32_PINMUX('C', 8, AF12)>,
/* SDIO_D0 */
- <STM32_PINMUX('C', 9, AF12)>,
/* SDIO_D1 */
- <STM32_PINMUX('C', 10, AF12)>,
/* SDIO_D2 */
- <STM32_PINMUX('C', 11, AF12)>,
/* SDIO_D3 */
- <STM32_PINMUX('C', 12, AF12)>;
/* SDIO_CK */
- drive-push-pull;
- slew-rate = <2>;
- };
-
- pins2 {
- pinmux = <STM32_PINMUX('D', 2, AF12)>;
/* SDIO_CMD */
- drive-open-drain;
- slew-rate = <2>;
- };
- };
-
- can1_pins_a: can1-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 9, AF9)>;
/* CAN1_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 8, AF9)>;
/* CAN1_RX */
- bias-pull-up;
- };
- };
-
- can2_pins_a: can2-0 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 13, AF9)>;
/* CAN2_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 5, AF9)>;
/* CAN2_RX */
- bias-pull-up;
- };
- };
-
- can2_pins_b: can2-1 {
- pins1 {
- pinmux = <STM32_PINMUX('B', 13, AF9)>;
/* CAN2_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('B', 12, AF9)>;
/* CAN2_RX */
- bias-pull-up;
- };
- };
- };
- };
-};
diff --git a/arch/arm/dts/stm32f429-disco.dts b/arch/arm/dts/stm32f429-disco.dts
deleted file mode 100644
index 30daabd10a2..00000000000
--- a/arch/arm/dts/stm32f429-disco.dts
+++ /dev/null
@@ -1,190 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2015 - Maxime Coquelin <mcoquelin.st...@gmail.com>
- */
-
-/dts-v1/;
-#include "stm32f429.dtsi"
-#include "stm32f429-pinctrl.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "STMicroelectronics STM32F429i-DISCO board";
- compatible = "st,stm32f429i-disco", "st,stm32f429";
-
- chosen {
- bootargs = "root=/dev/ram";
- stdout-path = "serial0:115200n8";
- };
-
- memory@90000000 {
- device_type = "memory";
- reg = <0x90000000 0x800000>;
- };
-
- aliases {
- serial0 = &usart1;
- };
-
- leds {
- compatible = "gpio-leds";
- led-red {
- gpios = <&gpiog 14 0>;
- };
- led-green {
- gpios = <&gpiog 13 0>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
- button-0 {
- label = "User";
- linux,code = <KEY_HOME>;
- gpios = <&gpioa 0 0>;
- };
- };
-
- /* This turns on vbus for otg for host mode (dwc2) */
- vcc5v_otg: vcc5v-otg-regulator {
- compatible = "regulator-fixed";
- gpio = <&gpioc 4 0>;
- regulator-name = "vcc5_host1";
- regulator-always-on;
- };
-};
-
-&clk_hse {
- clock-frequency = <8000000>;
-};
-
-&crc {
- status = "okay";
-};
-
-&i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c3_pins>;
- clock-frequency = <100000>;
- status = "okay";
-
- stmpe811@41 {
- compatible = "st,stmpe811";
- reg = <0x41>;
- interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
- interrupt-parent = <&gpioa>;
- /* 3.25 MHz ADC clock speed */
- st,adc-freq = <1>;
- /* 12-bit ADC */
- st,mod-12b = <1>;
- /* internal ADC reference */
- st,ref-sel = <0>;
- /* ADC converstion time: 80 clocks */
- st,sample-time = <4>;
-
- stmpe_touchscreen {
- compatible = "st,stmpe-ts";
- /* 8 sample average control */
- st,ave-ctrl = <3>;
- /* 7 length fractional part in z */
- st,fraction-z = <7>;
- /*
- * 50 mA typical 80 mA max touchscreen drivers
- * current limit value
- */
- st,i-drive = <1>;
- /* 1 ms panel driver settling time */
- st,settling = <3>;
- /* 5 ms touch detect interrupt delay */
- st,touch-det-delay = <5>;
- };
-
- stmpe_adc {
- compatible = "st,stmpe-adc";
- /* forbid to use ADC channels 3-0 (touch) */
- st,norequest-mask = <0x0F>;
- };
- };
-};
-
-<dc {
- status = "okay";
- pinctrl-0 = <<dc_pins_b>;
- pinctrl-names = "default";
-
- port {
- ltdc_out_rgb: endpoint {
- remote-endpoint = <&panel_in_rgb>;
- };
- };
-};
-
-&rtc {
- assigned-clocks = <&rcc 1 CLK_RTC>;
- assigned-clock-parents = <&rcc 1 CLK_LSI>;
- status = "okay";
-};
-
-&spi5 {
- status = "okay";
- pinctrl-0 = <&spi5_pins>;
- pinctrl-names = "default";
- #address-cells = <1>;
- #size-cells = <0>;
- cs-gpios = <&gpioc 1 GPIO_ACTIVE_LOW>, <&gpioc 2 GPIO_ACTIVE_LOW>;
-
- l3gd20: l3gd20@0 {
- compatible = "st,l3gd20-gyro";
- spi-max-frequency = <10000000>;
- st,drdy-int-pin = <2>;
- interrupt-parent = <&gpioa>;
- interrupts = <1 IRQ_TYPE_EDGE_RISING>,
- <2 IRQ_TYPE_EDGE_RISING>;
- reg = <0>;
- status = "okay";
- };
-
- display: display@1{
- /* Connect panel-ilitek-9341 to ltdc */
- compatible = "st,sf-tc240t-9370-t", "ilitek,ili9341";
- reg = <1>;
- spi-3wire;
- spi-max-frequency = <10000000>;
- dc-gpios = <&gpiod 13 0>;
- port {
- panel_in_rgb: endpoint {
- remote-endpoint = <<dc_out_rgb>;
- };
- };
- };
-};
-
-&timers5 {
- /* Override timer5 to act as clockevent */
- compatible = "st,stm32-timer";
- interrupts = <50>;
- status = "okay";
- /delete-property/#address-cells;
- /delete-property/#size-cells;
- /delete-property/clock-names;
- /delete-node/pwm;
- /delete-node/timer@4;
-};
-
-&usart1 {
- pinctrl-0 = <&usart1_pins_a>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&usbotg_hs {
- compatible = "st,stm32f4x9-fsotg";
- dr_mode = "host";
- pinctrl-0 = <&usbotg_fs_pins_b>;
- pinctrl-names = "default";
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32f429-pinctrl.dtsi
b/arch/arm/dts/stm32f429-pinctrl.dtsi
deleted file mode 100644
index 5be171eea50..00000000000
--- a/arch/arm/dts/stm32f429-pinctrl.dtsi
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2017 - Alexandre Torgue <alexandre.tor...@st.com>
- *
- */
-
-#include "stm32f4-pinctrl.dtsi"
-
-&pinctrl {
- compatible = "st,stm32f429-pinctrl";
-
- gpioa: gpio@40020000 {
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio@40020400 {
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio@40020800 {
- gpio-ranges = <&pinctrl 0 32 16>;
- };
-
- gpiod: gpio@40020c00 {
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio@40021000 {
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio@40021400 {
- gpio-ranges = <&pinctrl 0 80 16>;
- };
-
- gpiog: gpio@40021800 {
- gpio-ranges = <&pinctrl 0 96 16>;
- };
-
- gpioh: gpio@40021c00 {
- gpio-ranges = <&pinctrl 0 112 16>;
- };
-
- gpioi: gpio@40022000 {
- gpio-ranges = <&pinctrl 0 128 16>;
- };
-
- gpioj: gpio@40022400 {
- gpio-ranges = <&pinctrl 0 144 16>;
- };
-
- gpiok: gpio@40022800 {
- gpio-ranges = <&pinctrl 0 160 8>;
- };
-};
diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi
deleted file mode 100644
index 8133ea15b03..00000000000
--- a/arch/arm/dts/stm32f429.dtsi
+++ /dev/null
@@ -1,758 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2015 - Maxime Coquelin <mcoquelin.st...@gmail.com>
- *
- */
-
-#include "armv7-m.dtsi"
-#include <dt-bindings/clock/stm32fx-clock.h>
-#include <dt-bindings/mfd/stm32f4-rcc.h>
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- clocks {
- clk_hse: clk-hse {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
- };
-
- clk_lse: clk-lse {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- };
-
- clk_lsi: clk-lsi {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <32000>;
- };
-
- clk_i2s_ckin: i2s-ckin {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
- };
- };
-
- soc {
- romem: efuse@1fff7800 {
- compatible = "st,stm32f4-otp";
- reg = <0x1fff7800 0x400>;
- #address-cells = <1>;
- #size-cells = <1>;
- ts_cal1: calib@22c {
- reg = <0x22c 0x2>;
- };
- ts_cal2: calib@22e {
- reg = <0x22e 0x2>;
- };
- };
-
- timers2: timers@40000000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40000000 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer@1 {
- compatible = "st,stm32-timer-trigger";
- reg = <1>;
- status = "disabled";
- };
- };
-
- timers3: timers@40000400 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40000400 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer@2 {
- compatible = "st,stm32-timer-trigger";
- reg = <2>;
- status = "disabled";
- };
- };
-
- timers4: timers@40000800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40000800 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer@3 {
- compatible = "st,stm32-timer-trigger";
- reg = <3>;
- status = "disabled";
- };
- };
-
- timers5: timers@40000c00 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40000C00 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer@4 {
- compatible = "st,stm32-timer-trigger";
- reg = <4>;
- status = "disabled";
- };
- };
-
- timers6: timers@40001000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40001000 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
- clock-names = "int";
- status = "disabled";
-
- timer@5 {
- compatible = "st,stm32-timer-trigger";
- reg = <5>;
- status = "disabled";
- };
- };
-
- timers7: timers@40001400 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40001400 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM7)>;
- clock-names = "int";
- status = "disabled";
-
- timer@6 {
- compatible = "st,stm32-timer-trigger";
- reg = <6>;
- status = "disabled";
- };
- };
-
- timers12: timers@40001800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40001800 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM12)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer@11 {
- compatible = "st,stm32-timer-trigger";
- reg = <11>;
- status = "disabled";
- };
- };
-
- timers13: timers@40001c00 {
- compatible = "st,stm32-timers";
- reg = <0x40001C00 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
- };
-
- timers14: timers@40002000 {
- compatible = "st,stm32-timers";
- reg = <0x40002000 0x400>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
- };
-
- rtc: rtc@40002800 {
- compatible = "st,stm32-rtc";
- reg = <0x40002800 0x400>;
- clocks = <&rcc 1 CLK_RTC>;
- assigned-clocks = <&rcc 1 CLK_RTC>;
- assigned-clock-parents = <&rcc 1 CLK_LSE>;
- interrupt-parent = <&exti>;
- interrupts = <17 1>;
- st,syscfg = <&pwrcfg 0x00 0x100>;
- status = "disabled";
- };
-
- iwdg: watchdog@40003000 {
- compatible = "st,stm32-iwdg";
- reg = <0x40003000 0x400>;
- clocks = <&clk_lsi>;
- clock-names = "lsi";
- status = "disabled";
- };
-
- spi2: spi@40003800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32f4-spi";
- reg = <0x40003800 0x400>;
- interrupts = <36>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI2)>;
- status = "disabled";
- };
-
- spi3: spi@40003c00 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32f4-spi";
- reg = <0x40003c00 0x400>;
- interrupts = <51>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(SPI3)>;
- status = "disabled";
- };
-
- usart2: serial@40004400 {
- compatible = "st,stm32-uart";
- reg = <0x40004400 0x400>;
- interrupts = <38>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART2)>;
- status = "disabled";
- };
-
- usart3: serial@40004800 {
- compatible = "st,stm32-uart";
- reg = <0x40004800 0x400>;
- interrupts = <39>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART3)>;
- status = "disabled";
- dmas = <&dma1 1 4 0x400 0x0>,
- <&dma1 3 4 0x400 0x0>;
- dma-names = "rx", "tx";
- };
-
- usart4: serial@40004c00 {
- compatible = "st,stm32-uart";
- reg = <0x40004c00 0x400>;
- interrupts = <52>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART4)>;
- status = "disabled";
- };
-
- usart5: serial@40005000 {
- compatible = "st,stm32-uart";
- reg = <0x40005000 0x400>;
- interrupts = <53>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART5)>;
- status = "disabled";
- };
-
- i2c1: i2c@40005400 {
- compatible = "st,stm32f4-i2c";
- reg = <0x40005400 0x400>;
- interrupts = <31>,
- <32>;
- resets = <&rcc STM32F4_APB1_RESET(I2C1)>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C1)>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c3: i2c@40005c00 {
- compatible = "st,stm32f4-i2c";
- reg = <0x40005c00 0x400>;
- interrupts = <72>,
- <73>;
- resets = <&rcc STM32F4_APB1_RESET(I2C3)>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C3)>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- can1: can@40006400 {
- compatible = "st,stm32f4-bxcan";
- reg = <0x40006400 0x200>;
- interrupts = <19>, <20>, <21>, <22>;
- interrupt-names = "tx", "rx0", "rx1", "sce";
- resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
- st,can-primary;
- st,gcan = <&gcan>;
- status = "disabled";
- };
-
- gcan: gcan@40006600 {
- compatible = "st,stm32f4-gcan", "syscon";
- reg = <0x40006600 0x200>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
- };
-
- can2: can@40006800 {
- compatible = "st,stm32f4-bxcan";
- reg = <0x40006800 0x200>;
- interrupts = <63>, <64>, <65>, <66>;
- interrupt-names = "tx", "rx0", "rx1", "sce";
- resets = <&rcc STM32F4_APB1_RESET(CAN2)>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
- st,can-secondary;
- st,gcan = <&gcan>;
- status = "disabled";
- };
-
- dac: dac@40007400 {
- compatible = "st,stm32f4-dac-core";
- reg = <0x40007400 0x400>;
- resets = <&rcc STM32F4_APB1_RESET(DAC)>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(DAC)>;
- clock-names = "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- dac1: dac@1 {
- compatible = "st,stm32-dac";
- #io-channel-cells = <1>;
- reg = <1>;
- status = "disabled";
- };
-
- dac2: dac@2 {
- compatible = "st,stm32-dac";
- #io-channel-cells = <1>;
- reg = <2>;
- status = "disabled";
- };
- };
-
- usart7: serial@40007800 {
- compatible = "st,stm32-uart";
- reg = <0x40007800 0x400>;
- interrupts = <82>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART7)>;
- status = "disabled";
- };
-
- usart8: serial@40007c00 {
- compatible = "st,stm32-uart";
- reg = <0x40007c00 0x400>;
- interrupts = <83>;
- clocks = <&rcc 0 STM32F4_APB1_CLOCK(UART8)>;
- status = "disabled";
- };
-
- timers1: timers@40010000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40010000 0x400>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM1)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer@0 {
- compatible = "st,stm32-timer-trigger";
- reg = <0>;
- status = "disabled";
- };
- };
-
- timers8: timers@40010400 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40010400 0x400>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM8)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer@7 {
- compatible = "st,stm32-timer-trigger";
- reg = <7>;
- status = "disabled";
- };
- };
-
- usart1: serial@40011000 {
- compatible = "st,stm32-uart";
- reg = <0x40011000 0x400>;
- interrupts = <37>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART1)>;
- status = "disabled";
- dmas = <&dma2 2 4 0x400 0x0>,
- <&dma2 7 4 0x400 0x0>;
- dma-names = "rx", "tx";
- };
-
- usart6: serial@40011400 {
- compatible = "st,stm32-uart";
- reg = <0x40011400 0x400>;
- interrupts = <71>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(USART6)>;
- status = "disabled";
- };
-
- adc: adc@40012000 {
- compatible = "st,stm32f4-adc-core";
- reg = <0x40012000 0x400>;
- interrupts = <18>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC1)>;
- clock-names = "adc";
- interrupt-controller;
- #interrupt-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
-
- adc1: adc@0 {
- compatible = "st,stm32f4-adc";
- #io-channel-cells = <1>;
- reg = <0x0>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC1)>;
- interrupt-parent = <&adc>;
- interrupts = <0>;
- dmas = <&dma2 0 0 0x400 0x0>;
- dma-names = "rx";
- status = "disabled";
- };
-
- adc2: adc@100 {
- compatible = "st,stm32f4-adc";
- #io-channel-cells = <1>;
- reg = <0x100>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC2)>;
- interrupt-parent = <&adc>;
- interrupts = <1>;
- dmas = <&dma2 3 1 0x400 0x0>;
- dma-names = "rx";
- status = "disabled";
- };
-
- adc3: adc@200 {
- compatible = "st,stm32f4-adc";
- #io-channel-cells = <1>;
- reg = <0x200>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(ADC3)>;
- interrupt-parent = <&adc>;
- interrupts = <2>;
- dmas = <&dma2 1 2 0x400 0x0>;
- dma-names = "rx";
- status = "disabled";
- };
- };
-
- sdio: mmc@40012c00 {
- compatible = "arm,pl180", "arm,primecell";
- arm,primecell-periphid = <0x00880180>;
- reg = <0x40012c00 0x400>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(SDIO)>;
- clock-names = "apb_pclk";
- interrupts = <49>;
- max-frequency = <48000000>;
- status = "disabled";
- };
-
- spi1: spi@40013000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32f4-spi";
- reg = <0x40013000 0x400>;
- interrupts = <35>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI1)>;
- status = "disabled";
- };
-
- spi4: spi@40013400 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32f4-spi";
- reg = <0x40013400 0x400>;
- interrupts = <84>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI4)>;
- status = "disabled";
- };
-
- syscfg: syscon@40013800 {
- compatible = "st,stm32-syscfg", "syscon";
- reg = <0x40013800 0x400>;
- };
-
- exti: interrupt-controller@40013c00 {
- compatible = "st,stm32-exti";
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x40013C00 0x400>;
- interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>,
<23>, <40>, <41>, <42>, <62>, <76>;
- };
-
- timers9: timers@40014000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40014000 0x400>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM9)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- timer@8 {
- compatible = "st,stm32-timer-trigger";
- reg = <8>;
- status = "disabled";
- };
- };
-
- timers10: timers@40014400 {
- compatible = "st,stm32-timers";
- reg = <0x40014400 0x400>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
- };
-
- timers11: timers@40014800 {
- compatible = "st,stm32-timers";
- reg = <0x40014800 0x400>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
- clock-names = "int";
- status = "disabled";
-
- pwm {
- compatible = "st,stm32-pwm";
- #pwm-cells = <3>;
- status = "disabled";
- };
- };
-
- spi5: spi@40015000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32f4-spi";
- reg = <0x40015000 0x400>;
- interrupts = <85>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI5)>;
- dmas = <&dma2 3 2 0x400 0x0>,
- <&dma2 4 2 0x400 0x0>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
-
- spi6: spi@40015400 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32f4-spi";
- reg = <0x40015400 0x400>;
- interrupts = <86>;
- clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI6)>;
- status = "disabled";
- };
-
- pwrcfg: power-config@40007000 {
- compatible = "st,stm32-power-config", "syscon";
- reg = <0x40007000 0x400>;
- };
-
- ltdc: display-controller@40016800 {
- compatible = "st,stm32-ltdc";
- reg = <0x40016800 0x200>;
- interrupts = <88>, <89>;
- resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
- clocks = <&rcc 1 CLK_LCD>;
- clock-names = "lcd";
- status = "disabled";
- };
-
- crc: crc@40023000 {
- compatible = "st,stm32f4-crc";
- reg = <0x40023000 0x400>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(CRC)>;
- status = "disabled";
- };
-
- rcc: rcc@40023800 {
- #reset-cells = <1>;
- #clock-cells = <2>;
- compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
- reg = <0x40023800 0x400>;
- clocks = <&clk_hse>, <&clk_i2s_ckin>;
- st,syscfg = <&pwrcfg>;
- assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
- assigned-clock-rates = <1000000>;
- };
-
- dma1: dma-controller@40026000 {
- compatible = "st,stm32-dma";
- reg = <0x40026000 0x400>;
- interrupts = <11>,
- <12>,
- <13>,
- <14>,
- <15>,
- <16>,
- <17>,
- <47>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA1)>;
- #dma-cells = <4>;
- };
-
- dma2: dma-controller@40026400 {
- compatible = "st,stm32-dma";
- reg = <0x40026400 0x400>;
- interrupts = <56>,
- <57>,
- <58>,
- <59>,
- <60>,
- <68>,
- <69>,
- <70>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2)>;
- #dma-cells = <4>;
- st,mem2mem;
- };
-
- mac: ethernet@40028000 {
- compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
- reg = <0x40028000 0x8000>;
- reg-names = "stmmaceth";
- interrupts = <61>;
- interrupt-names = "macirq";
- clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(ETHMAC)>,
- <&rcc 0 STM32F4_AHB1_CLOCK(ETHMACTX)>,
- <&rcc 0 STM32F4_AHB1_CLOCK(ETHMACRX)>;
- st,syscon = <&syscfg 0x4>;
- snps,pbl = <8>;
- snps,mixed-burst;
- status = "disabled";
- };
-
- dma2d: dma2d@4002b000 {
- compatible = "st,stm32-dma2d";
- reg = <0x4002b000 0xc00>;
- interrupts = <90>;
- resets = <&rcc STM32F4_AHB1_RESET(DMA2D)>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2D)>;
- clock-names = "dma2d";
- status = "disabled";
- };
-
- usbotg_hs: usb@40040000 {
- compatible = "snps,dwc2";
- reg = <0x40040000 0x40000>;
- interrupts = <77>;
- clocks = <&rcc 0 STM32F4_AHB1_CLOCK(OTGHS)>;
- clock-names = "otg";
- status = "disabled";
- };
-
- usbotg_fs: usb@50000000 {
- compatible = "st,stm32f4x9-fsotg";
- reg = <0x50000000 0x40000>;
- interrupts = <67>;
- clocks = <&rcc 0 39>;
- clock-names = "otg";
- status = "disabled";
- };
-
- dcmi: dcmi@50050000 {
- compatible = "st,stm32-dcmi";
- reg = <0x50050000 0x400>;
- interrupts = <78>;
- resets = <&rcc STM32F4_AHB2_RESET(DCMI)>;
- clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>;
- clock-names = "mclk";
- pinctrl-names = "default";
- pinctrl-0 = <&dcmi_pins>;
- dmas = <&dma2 1 1 0x414 0x3>;
- dma-names = "tx";
- status = "disabled";
- };
-
- rng: rng@50060800 {
- compatible = "st,stm32-rng";
- reg = <0x50060800 0x400>;
- clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
-
- };
- };
-};
-
-&systick {
- clocks = <&rcc 1 SYSTICK>;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
deleted file mode 100644
index c9acabf0f53..00000000000
--- a/arch/arm/dts/stm32f469-disco.dts
+++ /dev/null
@@ -1,213 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2016 - Lee Jones <lee.jo...@linaro.org>
- *
- */
-
-/dts-v1/;
-#include "stm32f469.dtsi"
-#include "stm32f469-pinctrl.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "STMicroelectronics STM32F469i-DISCO board";
- compatible = "st,stm32f469i-disco", "st,stm32f469";
-
- chosen {
- bootargs = "root=/dev/ram";
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x00000000 0x1000000>;
- };
-
- aliases {
- serial0 = &usart3;
- };
-
- mmc_vcard: mmc_vcard {
- compatible = "regulator-fixed";
- regulator-name = "mmc_vcard";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vdd_dsi: vdd-dsi {
- compatible = "regulator-fixed";
- regulator-name = "vdd_dsi";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- soc {
- dma-ranges = <0xc0000000 0x0 0x10000000>;
- };
-
- leds {
- compatible = "gpio-leds";
- led-green {
- gpios = <&gpiog 6 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- };
- led-orange {
- gpios = <&gpiod 4 GPIO_ACTIVE_LOW>;
- };
- led-red {
- gpios = <&gpiod 5 GPIO_ACTIVE_LOW>;
- };
- led-blue {
- gpios = <&gpiok 3 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- autorepeat;
- button-0 {
- label = "User";
- linux,code = <KEY_WAKEUP>;
- gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
- };
- };
-
- /* This turns on vbus for otg for host mode (dwc2) */
- vcc5v_otg: vcc5v-otg-regulator {
- compatible = "regulator-fixed";
- enable-active-high;
- gpio = <&gpiob 2 GPIO_ACTIVE_HIGH>;
- regulator-name = "vcc5_host1";
- regulator-always-on;
- };
-};
-
-&rcc {
- compatible = "st,stm32f469-rcc", "st,stm32f42xx-rcc", "st,stm32-rcc";
-};
-
-&clk_hse {
- clock-frequency = <8000000>;
-};
-
-&dma2d {
- status = "okay";
-};
-
-&dsi {
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- dsi_in: endpoint {
- remote-endpoint = <<dc_out_dsi>;
- };
- };
-
- port@1 {
- reg = <1>;
- dsi_out: endpoint {
- remote-endpoint = <&dsi_panel_in>;
- };
- };
- };
-
- panel@0 {
- compatible = "orisetech,otm8009a";
- reg = <0>; /* dsi virtual channel (0..3) */
- reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
- power-supply = <&vdd_dsi>;
- status = "okay";
-
- port {
- dsi_panel_in: endpoint {
- remote-endpoint = <&dsi_out>;
- };
- };
- };
-};
-
-<dc {
- status = "okay";
-
- port {
- ltdc_out_dsi: endpoint {
- remote-endpoint = <&dsi_in>;
- };
- };
-};
-
-&rtc {
- status = "okay";
-};
-
-&timers1 {
- status = "okay";
-
- pwm {
- pinctrl-0 = <&pwm1_pins>;
- pinctrl-names = "default";
- status = "okay";
- };
-
- timer@0 {
- status = "okay";
- };
-};
-
-&timers3 {
- status = "okay";
-
- pwm {
- pinctrl-0 = <&pwm3_pins>;
- pinctrl-names = "default";
- status = "okay";
- };
-
- timer@2 {
- status = "okay";
- };
-};
-
-&sdio {
- status = "okay";
- vmmc-supply = <&mmc_vcard>;
- cd-gpios = <&gpiog 2 GPIO_ACTIVE_LOW>;
- broken-cd;
- pinctrl-names = "default", "opendrain";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_pins_od>;
- bus-width = <4>;
-};
-
-&timers5 {
- /* Override timer5 to act as clockevent */
- compatible = "st,stm32-timer";
- interrupts = <50>;
- status = "okay";
- /delete-property/#address-cells;
- /delete-property/#size-cells;
- /delete-property/clock-names;
- /delete-node/pwm;
- /delete-node/timer@4;
-};
-
-&usart3 {
- pinctrl-0 = <&usart3_pins_a>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&usbotg_fs {
- dr_mode = "host";
- pinctrl-0 = <&usbotg_fs_pins_a>;
- pinctrl-names = "default";
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32f469-pinctrl.dtsi
b/arch/arm/dts/stm32f469-pinctrl.dtsi
deleted file mode 100644
index 0610407c7b2..00000000000
--- a/arch/arm/dts/stm32f469-pinctrl.dtsi
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * Copyright 2017 - Alexandre Torgue <alexandre.tor...@st.com>
- */
-
-#include "stm32f4-pinctrl.dtsi"
-
-&pinctrl {
- compatible = "st,stm32f469-pinctrl";
-
- gpioa: gpio@40020000 {
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio@40020400 {
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio@40020800 {
- gpio-ranges = <&pinctrl 0 32 16>;
- };
-
- gpiod: gpio@40020c00 {
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio@40021000 {
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio@40021400 {
- gpio-ranges = <&pinctrl 0 80 16>;
- };
-
- gpiog: gpio@40021800 {
- gpio-ranges = <&pinctrl 0 96 16>;
- };
-
- gpioh: gpio@40021c00 {
- gpio-ranges = <&pinctrl 0 112 16>;
- };
-
- gpioi: gpio@40022000 {
- gpio-ranges = <&pinctrl 0 128 16>;
- };
-
- gpioj: gpio@40022400 {
- gpio-ranges = <&pinctrl 0 144 6>,
- <&pinctrl 12 156 4>;
- };
-
- gpiok: gpio@40022800 {
- gpio-ranges = <&pinctrl 3 163 5>;
- };
-};
diff --git a/arch/arm/dts/stm32f469.dtsi b/arch/arm/dts/stm32f469.dtsi
deleted file mode 100644
index 5f6a7976bb3..00000000000
--- a/arch/arm/dts/stm32f469.dtsi
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
-/* Copyright (C) STMicroelectronics 2017 - All Rights Reserved */
-
-#include "stm32f429.dtsi"
-
-/ {
- soc {
- dsi: dsi@40016c00 {
- compatible = "st,stm32-dsi";
- reg = <0x40016c00 0x800>;
- resets = <&rcc STM32F4_APB2_RESET(DSI)>;
- reset-names = "apb";
- clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
- clock-names = "pclk", "ref";
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index 031fb9a934c..de9d8547e61 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -15,6 +15,7 @@ config STM32F4
select STM32_SERIAL
select STM32_TIMER
select TIMER
+ imply OF_UPSTREAM
config STM32F7
bool "stm32f7 family"
diff --git a/configs/stm32f429-discovery_defconfig
b/configs/stm32f429-discovery_defconfig
index 77889336147..59416cb7e43 100644
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -7,7 +7,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32f429-disco"
CONFIG_SYS_LOAD_ADDR=0x90400000
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F429_DISCOVERY=y
diff --git a/configs/stm32f429-evaluation_defconfig
b/configs/stm32f429-evaluation_defconfig
index 2fa8dc9faad..5747187ac3c 100644
--- a/configs/stm32f429-evaluation_defconfig
+++ b/configs/stm32f429-evaluation_defconfig
@@ -6,7 +6,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000
CONFIG_ENV_SIZE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32429i-eval"
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F429_EVALUATION=y
diff --git a/configs/stm32f469-discovery_defconfig
b/configs/stm32f469-discovery_defconfig
index b0144763d37..80e15c4cdb0 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -6,7 +6,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000
CONFIG_ENV_SIZE=0x2000
-CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32f469-disco"
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_STM32F4=y
CONFIG_TARGET_STM32F469_DISCOVERY=y
--
2.25.1
