Enable OF_UPSTREAM flag for STM32MP2 platforms.
Add fixed-clock ck_flexgen_08 and ck_icn_ls_mcu until STM32MP25
clock driver will be available.
Signed-off-by: Patrice Chotard <patrice.chot...@foss.st.com>
---
arch/arm/dts/Makefile | 3 -
arch/arm/dts/stm32mp25-pinctrl.dtsi | 38 ---
arch/arm/dts/stm32mp251.dtsi | 301 -----------------------
arch/arm/dts/stm32mp253.dtsi | 23 --
arch/arm/dts/stm32mp255.dtsi | 9 -
arch/arm/dts/stm32mp257.dtsi | 9 -
arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi | 65 +++++
arch/arm/dts/stm32mp257f-ev1.dts | 55 -----
arch/arm/dts/stm32mp25xc.dtsi | 8 -
arch/arm/dts/stm32mp25xf.dtsi | 8 -
arch/arm/dts/stm32mp25xxai-pinctrl.dtsi | 83 -------
arch/arm/dts/stm32mp25xxak-pinctrl.dtsi | 71 ------
arch/arm/dts/stm32mp25xxal-pinctrl.dtsi | 71 ------
arch/arm/mach-stm32mp/Kconfig | 1 +
configs/stm32mp25_defconfig | 2 +-
15 files changed, 67 insertions(+), 680 deletions(-)
delete mode 100644 arch/arm/dts/stm32mp25-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32mp251.dtsi
delete mode 100644 arch/arm/dts/stm32mp253.dtsi
delete mode 100644 arch/arm/dts/stm32mp255.dtsi
delete mode 100644 arch/arm/dts/stm32mp257.dtsi
delete mode 100644 arch/arm/dts/stm32mp257f-ev1.dts
delete mode 100644 arch/arm/dts/stm32mp25xc.dtsi
delete mode 100644 arch/arm/dts/stm32mp25xf.dtsi
delete mode 100644 arch/arm/dts/stm32mp25xxai-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32mp25xxak-pinctrl.dtsi
delete mode 100644 arch/arm/dts/stm32mp25xxal-pinctrl.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1e98d95de60..b74277fe6b5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1068,9 +1068,6 @@ dtb-$(CONFIG_ASPEED_AST2600) += \
dtb-$(CONFIG_STM32MP15X) += \
stm32mp157c-odyssey.dtb
-dtb-$(CONFIG_STM32MP25X) += \
- stm32mp257f-ev1.dtb
-
dtb-$(CONFIG_SOC_K3_AM654) += \
k3-am654-r5-base-board.dtb
diff --git a/arch/arm/dts/stm32mp25-pinctrl.dtsi
b/arch/arm/dts/stm32mp25-pinctrl.dtsi
deleted file mode 100644
index d34a1d5e79c..00000000000
--- a/arch/arm/dts/stm32mp25-pinctrl.dtsi
+++ /dev/null
@@ -1,38 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-#include <dt-bindings/pinctrl/stm32-pinfunc.h>
-
-&pinctrl {
- usart2_pins_a: usart2-0 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
- bias-disable;
- drive-push-pull;
- slew-rate = <0>;
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
- bias-disable;
- };
- };
-
- usart2_idle_pins_a: usart2-idle-0 {
- pins1 {
- pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
- };
- pins2 {
- pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
- bias-disable;
- };
- };
-
- usart2_sleep_pins_a: usart2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
- <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
- };
- };
-};
diff --git a/arch/arm/dts/stm32mp251.dtsi b/arch/arm/dts/stm32mp251.dtsi
deleted file mode 100644
index e2d1c88a57f..00000000000
--- a/arch/arm/dts/stm32mp251.dtsi
+++ /dev/null
@@ -1,301 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-
-/ {
- #address-cells = <2>;
- #size-cells = <2>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu0: cpu@0 {
- compatible = "arm,cortex-a35";
- device_type = "cpu";
- reg = <0>;
- enable-method = "psci";
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a35-pmu";
- interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>;
- interrupt-parent = <&intc>;
- };
-
- arm_wdt: watchdog {
- compatible = "arm,smc-wdt";
- arm,smc-id = <0xb200005a>;
- status = "disabled";
- };
-
- clocks {
- ck_flexgen_08: ck-flexgen-08 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <64000000>;
- };
-
- ck_flexgen_51: ck-flexgen-51 {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
-
- ck_icn_ls_mcu: ck-icn-ls-mcu {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <200000000>;
- };
- };
-
- firmware {
- optee {
- compatible = "linaro,optee-tz";
- method = "smc";
- };
-
- scmi {
- compatible = "linaro,scmi-optee";
- #address-cells = <1>;
- #size-cells = <0>;
- linaro,optee-channel-id = <0>;
-
- scmi_clk: protocol@14 {
- reg = <0x14>;
- #clock-cells = <1>;
- };
-
- scmi_reset: protocol@16 {
- reg = <0x16>;
- #reset-cells = <1>;
- };
- };
- };
-
- intc: interrupt-controller@4ac00000 {
- compatible = "arm,cortex-a7-gic";
- #interrupt-cells = <3>;
- #address-cells = <1>;
- interrupt-controller;
- reg = <0x0 0x4ac10000 0x0 0x1000>,
- <0x0 0x4ac20000 0x0 0x2000>,
- <0x0 0x4ac40000 0x0 0x2000>,
- <0x0 0x4ac60000 0x0 0x2000>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupt-parent = <&intc>;
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_LOW)>;
- always-on;
- };
-
- soc@0 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- interrupt-parent = <&intc>;
- ranges = <0x0 0x0 0x0 0x80000000>;
-
- rifsc: rifsc-bus@42080000 {
- compatible = "simple-bus";
- reg = <0x42080000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- usart2: serial@400e0000 {
- compatible = "st,stm32h7-uart";
- reg = <0x400e0000 0x400>;
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ck_flexgen_08>;
- status = "disabled";
- };
- };
-
- bsec: efuse@44000000 {
- compatible = "st,stm32mp25-bsec";
- reg = <0x44000000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- part_number_otp@24 {
- reg = <0x24 0x4>;
- };
-
- package_otp@1e8 {
- reg = <0x1e8 0x1>;
- bits = <0 3>;
- };
- };
-
- syscfg: syscon@44230000 {
- compatible = "st,stm32mp25-syscfg", "syscon";
- reg = <0x44230000 0x10000>;
- };
-
- pinctrl: pinctrl@44240000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,stm32mp257-pinctrl";
- ranges = <0 0x44240000 0xa0400>;
- pins-are-numbered;
-
- gpioa: gpio@44240000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x0 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOA";
- status = "disabled";
- };
-
- gpiob: gpio@44250000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x10000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOB";
- status = "disabled";
- };
-
- gpioc: gpio@44260000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x20000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOC";
- status = "disabled";
- };
-
- gpiod: gpio@44270000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x30000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOD";
- status = "disabled";
- };
-
- gpioe: gpio@44280000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x40000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOE";
- status = "disabled";
- };
-
- gpiof: gpio@44290000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x50000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOF";
- status = "disabled";
- };
-
- gpiog: gpio@442a0000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x60000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOG";
- status = "disabled";
- };
-
- gpioh: gpio@442b0000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x70000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOH";
- status = "disabled";
- };
-
- gpioi: gpio@442c0000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x80000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOI";
- status = "disabled";
- };
-
- gpioj: gpio@442d0000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0x90000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOJ";
- status = "disabled";
- };
-
- gpiok: gpio@442e0000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0xa0000 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOK";
- status = "disabled";
- };
- };
-
- pinctrl_z: pinctrl@46200000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,stm32mp257-z-pinctrl";
- ranges = <0 0x46200000 0x400>;
- pins-are-numbered;
-
- gpioz: gpio@46200000 {
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- reg = <0 0x400>;
- clocks = <&ck_icn_ls_mcu>;
- st,bank-name = "GPIOZ";
- st,bank-ioport = <11>;
- status = "disabled";
- };
-
- };
- };
-};
diff --git a/arch/arm/dts/stm32mp253.dtsi b/arch/arm/dts/stm32mp253.dtsi
deleted file mode 100644
index af48e82efe8..00000000000
--- a/arch/arm/dts/stm32mp253.dtsi
+++ /dev/null
@@ -1,23 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-#include "stm32mp251.dtsi"
-
-/ {
- cpus {
- cpu1: cpu@1 {
- compatible = "arm,cortex-a35";
- device_type = "cpu";
- reg = <1>;
- enable-method = "psci";
- };
- };
-
- arm-pmu {
- interrupts = <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>;
- };
-};
diff --git a/arch/arm/dts/stm32mp255.dtsi b/arch/arm/dts/stm32mp255.dtsi
deleted file mode 100644
index e6fa596211f..00000000000
--- a/arch/arm/dts/stm32mp255.dtsi
+++ /dev/null
@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-#include "stm32mp253.dtsi"
-
-/ {
-};
diff --git a/arch/arm/dts/stm32mp257.dtsi b/arch/arm/dts/stm32mp257.dtsi
deleted file mode 100644
index 5c5000d3d9d..00000000000
--- a/arch/arm/dts/stm32mp257.dtsi
+++ /dev/null
@@ -1,9 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-#include "stm32mp255.dtsi"
-
-/ {
-};
diff --git a/arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi
b/arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi
index a35a9b90388..3beeaa19c12 100644
--- a/arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi
@@ -5,8 +5,73 @@
#include "stm32mp25-u-boot.dtsi"
+/ {
+ clocks {
+ ck_flexgen_08: ck-flexgen-08 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <64000000>;
+ };
+
+ ck_icn_ls_mcu: ck-icn-ls-mcu {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
+ };
+};
+
+&gpioa {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpiob {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpioc {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpiod {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpioe {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpiof {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpiog {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpioh {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpioi {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpioj {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpiok {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
+&gpioz {
+ clocks = <&ck_icn_ls_mcu>;
+};
+
&usart2 {
bootph-all;
+ clocks = <&ck_flexgen_08>;
};
&usart2_pins_a {
diff --git a/arch/arm/dts/stm32mp257f-ev1.dts b/arch/arm/dts/stm32mp257f-ev1.dts
deleted file mode 100644
index a88494eed34..00000000000
--- a/arch/arm/dts/stm32mp257f-ev1.dts
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-
-/dts-v1/;
-
-#include "stm32mp257.dtsi"
-#include "stm32mp25xf.dtsi"
-#include "stm32mp25-pinctrl.dtsi"
-#include "stm32mp25xxai-pinctrl.dtsi"
-
-/ {
- model = "STMicroelectronics STM32MP257F-EV1 Evaluation Board";
- compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
-
- aliases {
- serial0 = &usart2;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@80000000 {
- device_type = "memory";
- reg = <0x0 0x80000000 0x1 0x0>;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- fw@80000000 {
- compatible = "shared-dma-pool";
- reg = <0x0 0x80000000 0x0 0x4000000>;
- no-map;
- };
- };
-};
-
-&arm_wdt {
- timeout-sec = <32>;
- status = "okay";
-};
-
-&usart2 {
- pinctrl-names = "default", "idle", "sleep";
- pinctrl-0 = <&usart2_pins_a>;
- pinctrl-1 = <&usart2_idle_pins_a>;
- pinctrl-2 = <&usart2_sleep_pins_a>;
- status = "okay";
-};
diff --git a/arch/arm/dts/stm32mp25xc.dtsi b/arch/arm/dts/stm32mp25xc.dtsi
deleted file mode 100644
index 5e83a692648..00000000000
--- a/arch/arm/dts/stm32mp25xc.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-
-/ {
-};
diff --git a/arch/arm/dts/stm32mp25xf.dtsi b/arch/arm/dts/stm32mp25xf.dtsi
deleted file mode 100644
index 5e83a692648..00000000000
--- a/arch/arm/dts/stm32mp25xf.dtsi
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-
-/ {
-};
diff --git a/arch/arm/dts/stm32mp25xxai-pinctrl.dtsi
b/arch/arm/dts/stm32mp25xxai-pinctrl.dtsi
deleted file mode 100644
index abdbc7aebc7..00000000000
--- a/arch/arm/dts/stm32mp25xxai-pinctrl.dtsi
+++ /dev/null
@@ -1,83 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-
-&pinctrl {
- st,package = <STM32MP_PKG_AI>;
-
- gpioa: gpio@44240000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio@44250000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio@44260000 {
- status = "okay";
- ngpios = <14>;
- gpio-ranges = <&pinctrl 0 32 14>;
- };
-
- gpiod: gpio@44270000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio@44280000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio@44290000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 80 16>;
- };
-
- gpiog: gpio@442a0000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 96 16>;
- };
-
- gpioh: gpio@442b0000 {
- status = "okay";
- ngpios = <12>;
- gpio-ranges = <&pinctrl 2 114 12>;
- };
-
- gpioi: gpio@442c0000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 128 16>;
- };
-
- gpioj: gpio@442d0000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 144 16>;
- };
-
- gpiok: gpio@442e0000 {
- status = "okay";
- ngpios = <8>;
- gpio-ranges = <&pinctrl 0 160 8>;
- };
-};
-
-&pinctrl_z {
- gpioz: gpio@46200000 {
- status = "okay";
- ngpios = <10>;
- gpio-ranges = <&pinctrl_z 0 400 10>;
- };
-};
diff --git a/arch/arm/dts/stm32mp25xxak-pinctrl.dtsi
b/arch/arm/dts/stm32mp25xxak-pinctrl.dtsi
deleted file mode 100644
index 2e0d4d349d1..00000000000
--- a/arch/arm/dts/stm32mp25xxak-pinctrl.dtsi
+++ /dev/null
@@ -1,71 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-
-&pinctrl {
- st,package = <STM32MP_PKG_AK>;
-
- gpioa: gpio@44240000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio@44250000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio@44260000 {
- status = "okay";
- ngpios = <14>;
- gpio-ranges = <&pinctrl 0 32 14>;
- };
-
- gpiod: gpio@44270000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio@44280000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio@44290000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 80 16>;
- };
-
- gpiog: gpio@442a0000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 96 16>;
- };
-
- gpioh: gpio@442b0000 {
- status = "okay";
- ngpios = <12>;
- gpio-ranges = <&pinctrl 2 114 12>;
- };
-
- gpioi: gpio@442c0000 {
- status = "okay";
- ngpios = <12>;
- gpio-ranges = <&pinctrl 0 128 12>;
- };
-};
-
-&pinctrl_z {
- gpioz: gpio@46200000 {
- status = "okay";
- ngpios = <10>;
- gpio-ranges = <&pinctrl_z 0 400 10>;
- };
-};
diff --git a/arch/arm/dts/stm32mp25xxal-pinctrl.dtsi
b/arch/arm/dts/stm32mp25xxal-pinctrl.dtsi
deleted file mode 100644
index 2406e972554..00000000000
--- a/arch/arm/dts/stm32mp25xxal-pinctrl.dtsi
+++ /dev/null
@@ -1,71 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
-/*
- * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
- * Author: Alexandre Torgue <alexandre.tor...@foss.st.com> for
STMicroelectronics.
- */
-
-&pinctrl {
- st,package = <STM32MP_PKG_AL>;
-
- gpioa: gpio@44240000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 0 16>;
- };
-
- gpiob: gpio@44250000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 16 16>;
- };
-
- gpioc: gpio@44260000 {
- status = "okay";
- ngpios = <14>;
- gpio-ranges = <&pinctrl 0 32 14>;
- };
-
- gpiod: gpio@44270000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 48 16>;
- };
-
- gpioe: gpio@44280000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 64 16>;
- };
-
- gpiof: gpio@44290000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 80 16>;
- };
-
- gpiog: gpio@442a0000 {
- status = "okay";
- ngpios = <16>;
- gpio-ranges = <&pinctrl 0 96 16>;
- };
-
- gpioh: gpio@442b0000 {
- status = "okay";
- ngpios = <12>;
- gpio-ranges = <&pinctrl 2 114 12>;
- };
-
- gpioi: gpio@442c0000 {
- status = "okay";
- ngpios = <12>;
- gpio-ranges = <&pinctrl 0 128 12>;
- };
-};
-
-&pinctrl_z {
- gpioz: gpio@46200000 {
- status = "okay";
- ngpios = <10>;
- gpio-ranges = <&pinctrl_z 0 400 10>;
- };
-};
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index ad925201fca..58250901101 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -96,6 +96,7 @@ config STM32MP25X
imply CMD_NVEDIT_INFO
imply DM_REGULATOR
imply DM_REGULATOR_SCMI
+ imply OF_UPSTREAM
imply OPTEE
imply RESET_SCMI
imply SYSRESET_PSCI
diff --git a/configs/stm32mp25_defconfig b/configs/stm32mp25_defconfig
index 4538ff0ff7e..2f8d34d15ff 100644
--- a/configs/stm32mp25_defconfig
+++ b/configs/stm32mp25_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_STM32MP=y
CONFIG_SYS_MALLOC_F_LEN=0x400000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x90000000
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp257f-ev1"
+CONFIG_DEFAULT_DEVICE_TREE="st/stm32mp257f-ev1"
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_SYS_LOAD_ADDR=0x84000000
CONFIG_STM32MP25X=y
--
2.25.1
