More basic DBSC5 DRAM controller clean ups and improvements. The following changes since commit 4adbf64ff8d8c730223fd8ae299d770bebb6fe86:
Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next (2025-03-26 14:07:37 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-sh.git next for you to fetch changes up to 47dad5cc61dd955cca342bbda8c146548ef3409c: ram: renesas: dbsc5: Pass udevice and MODEMR0 to dbsc5_get_board_data() (2025-03-29 02:33:24 +0100) ---------------------------------------------------------------- Marek Vasut (5): ram: renesas: dbsc5: Clarify MR27/MR28/MR57 register operations ram: renesas: dbsc5: Drop space before dbsc5_ddr_setval_all_ch() ram: renesas: dbsc5: Improve dbsc5_send_dbcmd2() signature ram: renesas: dbsc5: Factor out dbsc5_wait_dbwait() ram: renesas: dbsc5: Pass udevice and MODEMR0 to dbsc5_get_board_data() drivers/ram/renesas/dbsc5/dram.c | 92 ++++++++++++++++++++++++++++------------ 1 file changed, 66 insertions(+), 26 deletions(-)
