Add support for the i.MX8 MEDIAMIX domain which is driving the power
over the whole display/rendering pipeline.

Signed-off-by: Miquel Raynal <miquel.ray...@bootlin.com>
Reviewed-by: Fabio Estevam <feste...@gmail.com>
---
 drivers/power/domain/imx8m-power-domain.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/power/domain/imx8m-power-domain.c 
b/drivers/power/domain/imx8m-power-domain.c
index 
c22fbe60675e96a628f205d10a71b66c7b33ef00..e54ba5d9a5476f678fb48fb16e7217b031acd78a
 100644
--- a/drivers/power/domain/imx8m-power-domain.c
+++ b/drivers/power/domain/imx8m-power-domain.c
@@ -40,6 +40,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IMX8MN_MIPI_A53_DOMAIN                 BIT(2)
 
 #define IMX8MP_HSIOMIX_A53_DOMAIN              BIT(19)
+#define IMX8MP_MEDIAMIX_A53_DOMAIN             BIT(12)
 #define IMX8MP_USB2_PHY_A53_DOMAIN             BIT(5)
 #define IMX8MP_USB1_PHY_A53_DOMAIN             BIT(4)
 #define IMX8MP_PCIE_PHY_A53_DOMAIN             BIT(3)
@@ -63,6 +64,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IMX8MN_MIPI_SW_Pxx_REQ                 BIT(0)
 
 #define IMX8MP_HSIOMIX_Pxx_REQ                 BIT(17)
+#define IMX8MP_MEDIAMIX_Pxx_REQ                 BIT(10)
 #define IMX8MP_USB2_PHY_Pxx_REQ                        BIT(3)
 #define IMX8MP_USB1_PHY_Pxx_REQ                        BIT(2)
 #define IMX8MP_PCIE_PHY_SW_Pxx_REQ             BIT(1)
@@ -81,6 +83,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IMX8MP_HSIOMIX_PWRDNACKN               BIT(28)
 #define IMX8MP_HSIOMIX_PWRDNREQN               BIT(12)
 
+#define IMX8MP_MEDIAMIX_PWRDNACKN              BIT(30)
+#define IMX8MP_MEDIAMIX_PWRDNREQN              BIT(14)
+
 /*
  * The PGC offset values in Reference Manual
  * (Rev. 1, 01/2018 and the older ones) GPC chapter's
@@ -101,6 +106,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IMX8MP_PGC_PCIE                        13
 #define IMX8MP_PGC_USB1                        14
 #define IMX8MP_PGC_USB2                        15
+#define IMX8MP_PGC_MEDIAMIX            22
 #define IMX8MP_PGC_HSIOMIX             29
 
 #define GPC_PGC_CTRL(n)                        (0x800 + (n) * 0x40)
@@ -303,6 +309,17 @@ static const struct imx_pgc_domain imx8mp_pgc_domains[] = {
                .pgc = BIT(IMX8MP_PGC_HSIOMIX),
                .keep_clocks = true,
        },
+
+       [IMX8MP_POWER_DOMAIN_MEDIAMIX] = {
+               .bits = {
+                       .pxx = IMX8MP_MEDIAMIX_Pxx_REQ,
+                       .map = IMX8MP_MEDIAMIX_A53_DOMAIN,
+                       .hskreq = IMX8MP_MEDIAMIX_PWRDNREQN,
+                       .hskack = IMX8MP_MEDIAMIX_PWRDNACKN,
+               },
+               .pgc = BIT(IMX8MP_PGC_MEDIAMIX),
+               .keep_clocks = true,
+       },
 };
 
 static const struct imx_pgc_regs imx8mp_pgc_regs = {

-- 
2.48.1

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