Dne nedelja, 23. marec 2025 ob 12:35:37 Srednjeevropski standardni čas je Andre Przywara napisal(a): > To be able to return to the BootROM FEL USB debug code, we must restore > the core's state as accurately as possible after the SPL has been run. > Since the BootROM runs in AArch32, but the SPL uses AArch64, this requires > a core reset, which clears the core's state. > So far we were saving and restoring the required registers like SCTLR > and VBAR, but could ignore the interrupt controller's state (GICC), since > that lives in MMIO registers, unaffected by a core reset. > Newer Allwinner SoCs now feature a GICv3 interrupt controller, which keeps > some GIC state in architected system registers, and those are cleared > when we switch back to AArch32. > > To enable FEL operation on the Allwinner A523 SoC, > Add AArch32 assembly code to save and restore the ICC_PMR and ICC_IGRPEN1 > system registers. The other GICv3 sysregs are either not relevant for the > BROM operation, or haven't been changed from their reset defaults by the > BROM anyway. > > This enables FEL operation on the Allwinner A523 family of SoCs. > > Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skra...@gmail.com> Best regards, Jernej
