On Tue, 2025-02-25 at 17:19 +0530, Chintan Vankar wrote:
> Enable cache for J722s to optimize performance of CPU to access data from
> memory.
>
> Signed-off-by: Chintan Vankar <c-van...@ti.com>
Reviewed-by: Alexander Sverdlin <alexander.sverd...@siemens.com>
> ---
>
> This patch is newly introduced in this series.
>
> board/ti/j722s/evm.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/board/ti/j722s/evm.c b/board/ti/j722s/evm.c
> index f085ecfd37e..793c028b53c 100644
> --- a/board/ti/j722s/evm.c
> +++ b/board/ti/j722s/evm.c
> @@ -8,6 +8,7 @@
>
> #include <asm/arch/hardware.h>
> #include <asm/io.h>
> +#include <cpu_func.h>
> #include <dm/uclass.h>
> #include <env.h>
> #include <fdt_support.h>
> @@ -20,6 +21,13 @@ int board_init(void)
> return 0;
> }
>
> +#if IS_ENABLED(CONFIG_SPL_BUILD)
> +void spl_board_init(void)
> +{
> + enable_caches();
> +}
> +#endif
> +
> #if defined(CONFIG_XPL_BUILD)
> void spl_perform_fixups(struct spl_image_info *spl_image)
> {
--
Alexander Sverdlin
Siemens AG
www.siemens.com
