On Mon, 2025-01-27 at 14:40 +0100, Christian Marangi wrote: > External email : Please do not click links or open attachments until > you have verified the sender or the content. > > > Add PCIe node for MT7981 with all the required properties to make > PCIe > work. > > Signed-off-by: Christian Marangi <ansuels...@gmail.com> > --- > arch/arm/dts/mt7981.dtsi | 35 +++++++++++++++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi > index 2360c6bbdca..5b4cadc22f7 100644 > --- a/arch/arm/dts/mt7981.dtsi > +++ b/arch/arm/dts/mt7981.dtsi > @@ -339,6 +339,41 @@ > status = "okay"; > }; > > + pcie: pcie@11280000 { > + compatible = "mediatek,mt8192-pcie"; > + device_type = "pci"; > + reg = <0x11280000 0x4000>; > + reg-names = "pcie-mac"; > + #address-cells = <3>; > + #size-cells = <2>; > + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&infracfg CLK_INFRA_IPCIE_CK>, > + <&infracfg CLK_INFRA_IPCIE_PIPE_CK>, > + <&infracfg CLK_INFRA_IPCIER_CK>, > + <&infracfg CLK_INFRA_IPCIEB_CK>; > + clock-names = "pl_250m", "tl_26m", "peri_26m", > "top_133m"; > + phys = <&u3port0 PHY_TYPE_PCIE>; > + phy-names = "pcie-phy"; > + bus-range = <0x00 0xff>; > + ranges = <0x82000000 0 0x20000000 0x20000000 0 > 0x10000000>; > + > + #interrupt-cells = <1>; > + > + interrupt-map-mask = <0 0 0 7>; > + interrupt-map = <0 0 0 1 &pcie_intc 0>, > + <0 0 0 2 &pcie_intc 1>, > + <0 0 0 3 &pcie_intc 2>, > + <0 0 0 4 &pcie_intc 3>; > + > + status = "disabled"; > + > + pcie_intc: interrupt-controller { > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <0>; > + }; > + }; > + > usbtphy: usb-phy@11e10000 { > compatible = "mediatek,mt7981", > "mediatek,generic-tphy-v2"; > -- > 2.47.1 >
Thanks! Reviewed-by: Weijie Gao <weijie....@mediatek.com> Tested-by: Weijie Gao <weijie....@mediatek.com>