Add initial dts for K230-CanMV powered by Canaan Kendryte K230 SoC, which has two RISC-V C908 cores, a big core with vector 1.0 extension and a small core without vector extension.
This patch is basically comes from Linux Kernel [1] and it assumes u-boot is running on the big core. Additionally, bootctl and reboot nodes are added to support sysreset [2] and an clk_dummy node is added to satisfy dependencies for usb [3]. Currently, u-boot is booted by the vendor's u-boot-spl. To meet the requirements [4][5] of vendor's u-boot-spl for u-boot, a binman node with mkimage child node is added here, which will compress u-boot.bin with gzip and generate an image named "uboot" in the file u-boot-gz.img. [1] https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=k230-basic [2] https://github.com/kendryte/k230_sdk/blob/v1.8/src/big/rt-smart/kernel/bsp/maix3/board/interdrv/sysctl/sysctl_boot/sysctl_boot.c#L67 [3] https://lore.kernel.org/linux-riscv/tencent_ad84b436c2f31108b66b4739d6e306c5e...@qq.com/ [4] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan/common/k230_img.c#L306 [5] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan/common/k230_img.c#L125 Signed-off-by: Junhui Liu <junhui....@pigmoral.tech> --- arch/riscv/dts/Makefile | 1 + arch/riscv/dts/k230-canmv.dts | 31 +++++++ arch/riscv/dts/k230-u-boot.dtsi | 25 ++++++ arch/riscv/dts/k230.dtsi | 175 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 232 insertions(+) diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index b64fc0daf3cb8223737561c3c2221aeff687b45f..cf1872f3fdc397e6c1ccf533ebfea8421dd967d1 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -2,6 +2,7 @@ dtb-$(CONFIG_TARGET_ANDES_AE350) += ae350_32.dtb ae350_64.dtb dtb-$(CONFIG_TARGET_BANANAPI_F3) += k1-bananapi-f3.dtb +dtb-$(CONFIG_TARGET_K230_CANMV) += k230-canmv.dtb dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += mpfs-icicle-kit.dtb dtb-$(CONFIG_TARGET_MILKV_DUO) += cv1800b-milkv-duo.dtb dtb-$(CONFIG_TARGET_LICHEERV_NANO) += sg2002-licheerv-nano-b.dtb diff --git a/arch/riscv/dts/k230-canmv.dts b/arch/riscv/dts/k230-canmv.dts new file mode 100644 index 0000000000000000000000000000000000000000..ced9c457cc24b35343c1d51569bc7d947840b5fa --- /dev/null +++ b/arch/riscv/dts/k230-canmv.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2024 Yangyu Chen <c...@cyyself.name> + * Copyright (C) 2025 Junhui Liu <junhui....@pigmoral.tech> + */ + +/dts-v1/; +#include "k230.dtsi" + +/ { + model = "Canaan CanMV-K230"; + compatible = "canaan,canmv-k230", "canaan,kendryte-k230"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +/* onboard RTL8152 */ +&usb1 { + status = "okay"; +}; diff --git a/arch/riscv/dts/k230-u-boot.dtsi b/arch/riscv/dts/k230-u-boot.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..bb66ad3c153df8655b4540760d95b4bc708c0036 --- /dev/null +++ b/arch/riscv/dts/k230-u-boot.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 Junhui Liu <junhui....@pigmoral.tech> + */ + +#include <linux/stringify.h> + +/ { + binman: binman { + }; +}; + +&binman { + mkimage { + filename = "u-boot-gz.img"; + args = "-A", "riscv", "-T", "firmware", "-O", "u-boot", + "-C", "gzip", "-n", "uboot", + "-a", __stringify(CONFIG_TEXT_BASE), + "-e", __stringify(CONFIG_TEXT_BASE); + blob { + filename = "u-boot.bin"; + compress = "gzip"; + }; + }; +}; diff --git a/arch/riscv/dts/k230.dtsi b/arch/riscv/dts/k230.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..cf596677de18a4d984d5f5f973dca61a86fe66cb --- /dev/null +++ b/arch/riscv/dts/k230.dtsi @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2024 Yangyu Chen <c...@cyyself.name> + * Copyright (C) 2025 Junhui Liu <junhui....@pigmoral.tech> + */ + +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "canaan,kendryte-k230"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <27000000>; + + cpu@0 { + compatible = "thead,c908", "riscv"; + device_type = "cpu"; + reg = <0>; + riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zfh_zba_zbb_zbc_zbs_zvfh_svpbmt"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", + "zicbop", "zicboz", "zicntr", "zicsr", "zifencei", + "zihpm", "zfh", "zba", "zbb", "zbc", "zbs", "zvfh", + "svpbmt"; + riscv,cbom-block-size = <64>; + riscv,cbop-block-size = <64>; + riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + }; + + apb_clk: apb-clk-clock { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + clock-output-names = "apb_clk"; + #clock-cells = <0>; + }; + + clk_dummy: clock-dummy { + compatible = "fixed-clock"; + clock-frequency = <0>; + clock-output-names = "clk_dummy"; + #clock-cells = <0>; + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&bootctl>; + offset = <0x60>; + mask = <0x10001>; + value = <0x10001>; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&plic>; + #address-cells = <2>; + #size-cells = <2>; + dma-noncoherent; + ranges; + + bootctl: syscon@0x91102000 { + compatible = "syscon"; + reg = <0x0 0x91102000 0x0 0x1000>; + }; + + plic: interrupt-controller@f00000000 { + compatible = "canaan,k230-plic" ,"thead,c900-plic"; + reg = <0xf 0x00000000 0x0 0x04000000>; + interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + riscv,ndev = <208>; + }; + + clint: timer@f04000000 { + compatible = "canaan,k230-clint", "thead,c900-clint"; + reg = <0xf 0x04000000 0x0 0x00010000>; + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; + }; + + uart0: serial@91400000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91400000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart1: serial@91401000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91401000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart2: serial@91402000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91402000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart3: serial@91403000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91403000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart4: serial@91404000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91404000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + usb0: usb@91500000 { + compatible = "canaan,k230-otg", "snps,dwc2"; + reg = <0x0 0x91500000 0x0 0x40000>; + interrupts = <173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_dummy>; + clock-names = "otg"; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <64>; + g-tx-fifo-size = <512 1024 64 64 64 64>; + status = "disabled"; + }; + + usb1: usb@91540000 { + compatible = "canaan,k230-otg", "snps,dwc2"; + reg = <0x0 0x91540000 0x0 0x40000>; + interrupts = <174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_dummy>; + clock-names = "otg"; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <64>; + g-tx-fifo-size = <512 1024 64 64 64 64>; + status = "disabled"; + }; + }; +}; -- 2.47.1
