On Fri, Dec 27, 2024 at 10:19:34AM +0530, Venkatesh Yadav Abbarapu wrote:
> Update the spi_nor_read() function based on the config SPI_FLASH_BAR
> and update the length and bank calculation by spliting the memory of
> 16MB size banks only when the address width is 3byte.
> Fix the read issue for 4byte address width by passing the entire
> length to the read function. Also update the size when the configuration
> is stacked.
>
> Fixes: 5d40b3d384 ("mtd: spi-nor: Add parallel and stacked memories support")
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbar...@amd.com>I don't think you've run this through CI? https://source.denx.de/u-boot/u-boot/-/jobs/984698#L289 and similar on all sandbox targets, and Azure shows it too. -- Tom
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