On 05/17/2011 12:29 AM, Fabio Estevam wrote:
> Make the weim register set complete for MX51/MX53.
>
> While at it also add the weim chip select 1 address definition.
>
> Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
> ---
> Changes since v1:
> - Make the weim struct complete
>
> arch/arm/include/asm/arch-mx5/imx-regs.h | 46
> ++++++++++++++++++++++++++----
> 1 files changed, 40 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h
> b/arch/arm/include/asm/arch-mx5/imx-regs.h
> index a1849f8..d80e0c0 100644
> --- a/arch/arm/include/asm/arch-mx5/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
> @@ -41,6 +41,7 @@
> #define CSD1_BASE_ADDR 0xB0000000
> #define NFC_BASE_ADDR_AXI 0xF7FF0000
> #define IRAM_BASE_ADDR 0xF8000000
> +#define CS1_BASE_ADDR 0xF4000000
> #else
> #error "CPU_TYPE not defined"
> #endif
> @@ -231,12 +232,45 @@ struct clkctl {
>
> /* WEIM registers */
> struct weim {
> - u32 csgcr1;
> - u32 csgcr2;
> - u32 csrcr1;
> - u32 csrcr2;
> - u32 cswcr1;
> - u32 cswcr2;
> + u32 cs0gcr1;
The patch breaks the vision2 board. However, you set the names now
exactly how we can find in the reference manual, and this is better and
generates less confusion. Do not worry about the vision2, I will fix it
when your patch will be merged and before my pull.
Best regards,
Stefano Babic
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