Not all platforms supports sgmii and/or usxgmii. So we add Kconfig
options for these features and enable them only for supported
platforms.

Signed-off-by: Weijie Gao <weijie....@mediatek.com>
---
 drivers/net/Kconfig   | 12 ++++++++++++
 drivers/net/mtk_eth.c | 39 +++++++++++++++++++++++++++++----------
 2 files changed, 41 insertions(+), 10 deletions(-)

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 576cd2d50ad..5a57d05d977 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -975,6 +975,18 @@ config MEDIATEK_ETH
          This Driver support MediaTek Ethernet GMAC
          Say Y to enable support for the MediaTek Ethernet GMAC.
 
+if MEDIATEK_ETH
+
+config MTK_ETH_SGMII
+       bool
+       default y if ARCH_MEDIATEK && !TARGET_MT7623
+
+config MTK_ETH_XGMII
+       bool
+       default y if TARGET_MT7987 || TARGET_MT7988
+
+endif # MEDIATEK_ETH
+
 config HIFEMAC_ETH
        bool "HiSilicon Fast Ethernet Controller"
        select DM_CLK
diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c
index 5c210fd3e14..d3f29e4a0d0 100644
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -1505,7 +1505,7 @@ static void mtk_10gbaser_init(struct mtk_eth_priv *priv)
        mtk_usxgmii_setup_phya_force_10000(priv);
 }
 
-static void mtk_mac_init(struct mtk_eth_priv *priv)
+static int mtk_mac_init(struct mtk_eth_priv *priv)
 {
        int i, sgmii_sel_mask = 0, ge_mode = 0;
        u32 mcr;
@@ -1522,13 +1522,16 @@ static void mtk_mac_init(struct mtk_eth_priv *priv)
                break;
        case PHY_INTERFACE_MODE_SGMII:
        case PHY_INTERFACE_MODE_2500BASEX:
+               if (!IS_ENABLED(CONFIG_MTK_ETH_SGMII)) {
+                       printf("Error: SGMII is not supported on this 
platform\n");
+                       return -ENOTSUPP;
+               }
+
                if (MTK_HAS_CAPS(priv->soc->caps, MTK_GMAC2_U3_QPHY)) {
                        mtk_infra_rmw(priv, USB_PHY_SWITCH_REG, QPHY_SEL_MASK,
                                      SGMII_QPHY_SEL);
                }
 
-               ge_mode = GE_MODE_RGMII;
-
                if (MTK_HAS_CAPS(priv->soc->caps, MTK_ETH_PATH_MT7622_SGMII))
                        sgmii_sel_mask = SYSCFG1_SGMII_SEL_M;
 
@@ -1539,6 +1542,8 @@ static void mtk_mac_init(struct mtk_eth_priv *priv)
                        mtk_sgmii_an_init(priv);
                else
                        mtk_sgmii_force_init(priv);
+
+               ge_mode = GE_MODE_RGMII;
                break;
        case PHY_INTERFACE_MODE_MII:
        case PHY_INTERFACE_MODE_GMII:
@@ -1595,12 +1600,19 @@ static void mtk_mac_init(struct mtk_eth_priv *priv)
                             RX_RST | RXC_DQSISEL);
                mtk_gmac_rmw(priv, GMAC_TRGMII_RCK_CTRL, RX_RST, 0);
        }
+
+       return 0;
 }
 
-static void mtk_xmac_init(struct mtk_eth_priv *priv)
+static int mtk_xmac_init(struct mtk_eth_priv *priv)
 {
        u32 force_link = 0;
 
+       if (!IS_ENABLED(CONFIG_MTK_ETH_XGMII)) {
+               printf("Error: 10Gb interface is not supported on this 
platform\n");
+               return -ENOTSUPP;
+       }
+
        switch (priv->phy_interface) {
        case PHY_INTERFACE_MODE_USXGMII:
                mtk_usxgmii_an_init(priv);
@@ -1633,6 +1645,8 @@ static void mtk_xmac_init(struct mtk_eth_priv *priv)
 
        /* Force GMAC link down */
        mtk_gmac_write(priv, GMAC_PORT_MCR(priv->gmac_id), FORCE_MODE);
+
+       return 0;
 }
 
 static void mtk_eth_fifo_init(struct mtk_eth_priv *priv)
@@ -1922,9 +1936,12 @@ static int mtk_eth_probe(struct udevice *dev)
        if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII ||
            priv->phy_interface == PHY_INTERFACE_MODE_10GBASER ||
            priv->phy_interface == PHY_INTERFACE_MODE_XGMII)
-               mtk_xmac_init(priv);
+               ret = mtk_xmac_init(priv);
        else
-               mtk_mac_init(priv);
+               ret = mtk_mac_init(priv);
+
+       if (ret)
+               return ret;
 
        /* Probe phy if switch is not specified */
        if (priv->sw == SW_NONE)
@@ -2032,8 +2049,9 @@ static int mtk_eth_of_to_plat(struct udevice *dev)
                }
        }
 
-       if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-           priv->phy_interface == PHY_INTERFACE_MODE_2500BASEX) {
+       if ((priv->phy_interface == PHY_INTERFACE_MODE_SGMII ||
+            priv->phy_interface == PHY_INTERFACE_MODE_2500BASEX) &&
+           IS_ENABLED(CONFIG_MTK_ETH_SGMII)) {
                /* get corresponding sgmii phandle */
                ret = dev_read_phandle_with_args(dev, "mediatek,sgmiisys",
                                                 NULL, 0, 0, &args);
@@ -2055,8 +2073,9 @@ static int mtk_eth_of_to_plat(struct udevice *dev)
                /* Upstream linux use mediatek,pnswap instead of pn_swap */
                priv->pn_swap = ofnode_read_bool(args.node, "pn_swap") ||
                                ofnode_read_bool(args.node, "mediatek,pnswap");
-       } else if (priv->phy_interface == PHY_INTERFACE_MODE_USXGMII ||
-                  priv->phy_interface == PHY_INTERFACE_MODE_10GBASER) {
+       } else if ((priv->phy_interface == PHY_INTERFACE_MODE_USXGMII ||
+                   priv->phy_interface == PHY_INTERFACE_MODE_10GBASER) &&
+                  IS_ENABLED(CONFIG_MTK_ETH_XGMII)) {
                /* get corresponding usxgmii phandle */
                ret = dev_read_phandle_with_args(dev, "mediatek,usxgmiisys",
                                                 NULL, 0, 0, &args);
-- 
2.34.1

Reply via email to