On Thu, Dec 05, 2024 at 10:41:17AM +0100, Michael Nazzareno Trimarchi wrote:
> Hi
>
> Il gio 5 dic 2024, 10:36 Maniyam, Dinesh <dinesh.mani...@intel.com> ha
> scritto:
>
> >
> >
> > > -----Original Message-----
> > > From: Maniyam, Dinesh <dinesh.mani...@intel.com>
> > > Sent: Thursday, 5 December 2024 5:23 pm
> > > To: u-boot@lists.denx.de
> > > Cc: Marek <ma...@denx.de>; Simon <simon.k.r.goldschm...@gmail.com>; Tom
> > > Rini <tr...@konsulko.com>; Dario Binacchi
> > > <dario.binac...@amarulasolutions.com>; Michael Trimarchi
> > > <mich...@amarulasolutions.com>; Johan Jonker <jbx6...@gmail.com>; Michal
> > > Simek <michal.si...@amd.com>; Arseniy Krasnov
> > > <avkras...@salutedevices.com>; Alexander Dahl <a...@thorsis.com>; William
> > > Zhang <william.zh...@broadcom.com>; Igor Prusov
> > > <ivpru...@salutedevices.com>; Meng, Tingting <tingting.m...@intel.com>;
> > > Chee, Tien Fong <tien.fong.c...@intel.com>; Hea, Kok Kiang
> > > <kok.kiang....@intel.com>; Maniyam, Dinesh <dinesh.mani...@intel.com>;
> > > Ng, Boon Khai <boon.khai...@intel.com>; Yuslaimi, Alif Zakuan
> > > <alif.zakuan.yusla...@intel.com>; Zamri, Muhammad Hazim Izzat
> > > <muhammad.hazim.izzat.za...@intel.com>; Lim, Jit Loon
> > > <jit.loon....@intel.com>; Tang, Sieu Mun <sieu.mun.t...@intel.com>
> > > Subject: [resend v2 14/19] configs: nand2_defconfig: Enable configs for
> > nand boot
> > >
> > > From: Dinesh Maniyam <dinesh.mani...@intel.com>
> > >
> > > Enable configs for nand boot.
> > >
> > > Signed-off-by: Dinesh Maniyam <dinesh.mani...@intel.com>
> > >
> > > ---
> > > v2:
> > > - remove the "this patch is to" commit phrases
> > > - using #include mechanism to keep track of the variant
> > > - add maintainer
> > > ---
> > > ---
> > > board/intel/agilex5-socdk/MAINTAINERS | 2 ++
> > > configs/socfpga_agilex5_nand2_defconfig | 33 +++++++++++++++++++++++++
> > > 2 files changed, 35 insertions(+)
> > > create mode 100644 configs/socfpga_agilex5_nand2_defconfig
> > >
> > > diff --git a/board/intel/agilex5-socdk/MAINTAINERS b/board/intel/agilex5-
> > > socdk/MAINTAINERS
> > > index b696f788c8..30d8815d20 100644
> > > --- a/board/intel/agilex5-socdk/MAINTAINERS
> > > +++ b/board/intel/agilex5-socdk/MAINTAINERS
> > > @@ -2,7 +2,9 @@ SOCFPGA BOARD
> > > M: Tien Fong Chee <tien.fong.c...@intel.com>
> > > M: Teik Heng Chong <teik.heng.ch...@intel.com>
> > > M: Jit Loon Lim <jit.loon....@intel.com>
> > > +M: Dinesh Maniyam <dinesh.mani...@intel.com>
> > > S: Maintained
> > > F: board/intel/agilex5-socdk/
> > > F: include/configs/socfpga_agilex5_socdk.h
> > > F: configs/socfpga_agilex5_defconfig
> > > +F: configs/socfpga_agilex5_nand2_defconfig
> > > diff --git a/configs/socfpga_agilex5_nand2_defconfig
> > > b/configs/socfpga_agilex5_nand2_defconfig
> > > new file mode 100644
> > > index 0000000000..3bfe6270fd
> > > --- /dev/null
> > > +++ b/configs/socfpga_agilex5_nand2_defconfig
> > > @@ -0,0 +1,33 @@
> > > +#include <configs/socfpga_agilex5_defconfig>
> > > +
> > > +CONFIG_ARM=y
> > > +CONFIG_ARCH_SOCFPGA=y
> > > +CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex5_socdk"
> > > +CONFIG_OF_UPSTREAM=y
> > > +CONFIG_BOOTARGS="earlycon panic=-1 root=${nandroot} rw rootwait
> > > rootfstype=ubifs ubi.mtd=1"
> > > +CONFIG_TARGET_SOCFPGA_AGILEX5_NAND2=y
> > > +CONFIG_PHY_CADENCE_COMBOPHY=n
> > > +CONFIG_SPL_PHY_CADENCE_COMBOPHY=n
> > > +# CONFIG_MMC_DW is not set
> > > +CONFIG_SPL_MTD=y
> > > +CONFIG_CMD_NAND_TRIMFFS=y
> > > +CONFIG_CMD_NAND_LOCK_UNLOCK=y
> > > +CONFIG_SPL_MTD_SUPPORT=y
> > > +CONFIG_MTDIDS_DEFAULT="nand0=10b80000.nand.0"
> > > +CONFIG_MTDPARTS_DEFAULT="mtdparts=10b80000.nand.0:2m(u-boot),-
> > > (root)"
> > > +CONFIG_CMD_UBIFS=y
> > > +CONFIG_MTD_UBI=y
> > > +CONFIG_MTD_UBI_WL_THRESHOLD=4096
> > > +CONFIG_MTD_UBI_BEB_LIMIT=20
> > > +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
> > > +CONFIG_SYS_NAND_U_BOOT_OFFS=0x0
> > > +CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x100000
> > > +CONFIG_UBI_SILENCE_MSG=y
> > > +CONFIG_MTD_RAW_NAND=y
> > > +CONFIG_NAND_CADENCE=y
> > > +CONFIG_SPL_NAND_SUPPORT=y
> > > +CONFIG_SPL_NAND_FRAMEWORK=y
> > > +CONFIG_SPL_NAND_CADENCE=y
> > > +CONFIG_SYS_NAND_ONFI_DETECTION=y
> > > +CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
> > > +CONFIG_SYS_NAND_PAGE_SIZE=0x800
> > > --
> > > 2.19.0
> >
> > Hi Michael,
> >
> > Please guide me through the process to run the CI in github.
> >
>
> I will do it for you and send some instructions today.
>
> Sorry for delay. I was busy ;)To run CI in github we have https://docs.u-boot.org/en/latest/develop/ci_testing.html and where it's not clear enough please send patches to update doc/develop/ci_testing.rst thanks! -- Tom
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