On 15:52, Venkatesh Yadav Abbarapu wrote:
> Enable mt35xu512aba_fixups for all mt35 series flashes to work
> in DTR mode, and return after nor->fixups is updated, otherwise
> it will get overwritten with macronix_octal_fixups.
> This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU
> is enabled and SPI_NOR_OCTAL_DTR_READ flag is set in id table.
>
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.s...@amd.com>
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbar...@amd.com>
> ---
> Changes in v2:
> - Removed the SPI_XFER_SET_DDR flag.
> ---
> drivers/mtd/spi/spi-nor-core.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index ec841fb13b..96f749f7a8 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -4404,8 +4404,13 @@ void spi_nor_set_fixups(struct spi_nor *nor)
> #endif
>
> #ifdef CONFIG_SPI_FLASH_MT35XU
> - if (!strcmp(nor->info->name, "mt35xu512aba"))
> + if (!strcmp(nor->info->name, "mt35xu512aba") ||
> + !strcmp(nor->info->name, "mt35xl512aba") ||
> + !strcmp(nor->info->name, "mt35xu01g") ||
> + !strcmp(nor->info->name, "mt35xu02g")) {
> nor->fixups = &mt35xu512aba_fixups;
> + return;
> + }
> #endif
>
> #if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX)
> --
> 2.34.1
>
Reviewed-by: Prasanth Babu Mantena <p-mant...@ti.com>
