Am Mon, 21 Oct 2024 08:03:35 +0200
schrieb Alexander Dahl <a...@thorsis.com>:
> Hello Benedikt,
>
> Am Fri, Oct 18, 2024 at 04:19:08PM +0200 schrieb Benedikt Spranger:
> > On Fri, 18 Oct 2024 15:11:20 +0200
> > Alexander Dahl <a...@thorsis.com> wrote:
> >
> > Hello Alexander,
> >
> > > Am Fri, Oct 18, 2024 at 10:30:00AM +0200 schrieb Benedikt
> > > Spranger:
> > > > OK, you might say the nand_atmel NAND driver is obsolete, but it
> > > > was the only solution to get booting from NAND running. The new
> > > > DM based NAND driver refused to do anything usefull, so I
> > > > dropped it after spending a couple of days debugging it:
> > >
> > > Strange. I have at least three different boards with SAMA5D27
> > > successfully booting from NAND flash with the new DM based driver
> > > (unfortunately none of them upstreamed, which also won't change
> > > in the foreseeable future, sorry).
> > OK.
> >
> > > Do you use at91bootstrap as 2nd level bootloader like me or
> > > something else?
> > I use the U-Boot SPL. There is no UBI support in at91boostrap. There
> > were some attemps, but...
> > No interest at the at91bootstrap side.
>
> Yeah, been there. Wanted at91bootstrap to boot from SPI-NOR which is
> _not_ Quad-SPI, and the feature request was closed with "if you wanna
> do it by yourself, ask our support for help". :-/
>
> > > For me it was basically getting the dts for U-Boot correct, but
> > > I got that running with all U-Boot releases since 2023.04 up to
> > > 2024.10. Could you share some more detail?
> > I face all the trouble in SPL. And since the SPL is the essential
> > part here (UBI support) I gave up at one point. I simply couldn't
> > any usefull read data from the NAND flash, but all 0.
>
> You can not store bootstrap or SPL in UBI, it must sit in first sector
> of raw NAND, I suppose that's how you load SPL?
Sorry for not beeing that clear.
The SPL sits in the first Page in NAND flash. It does it's magic and
then load the U-Boot payload from an UBI volume (Or directly load a
kernel). Then it "starts" the payload.
> Did you try reading/writing raw NAND from there?
I try to read from SPL. That's all what ubispl wants. No need for write
support here.
> I'm not familiar with SPL, does it consider dts?
It consider dts.
> I could share my dts parts if that helps you.
That would be great. I definitly give it a try.
So here is a quick extract (EBI is also used otherwise) of what I did.
Hopefully I did not forget anything...
--- a/arch/arm/dts/at91-sama5d27_ABC.dts
+++ b/arch/arm/dts/at91-sama5d27_ABC.dts
@@ -63,7 +63,62 @@
bias-disable;
bootph-all;
};
+
+ pinctrl_nand0_default: nand0_default {
+ pinmux =
+ <PIN_PA0__D0>,
+ <PIN_PA1__D1>,
+ <PIN_PA2__D2>,
+ <PIN_PA3__D3>,
+ <PIN_PA4__D4>,
+ <PIN_PA5__D5>,
+ <PIN_PA6__D6>,
+ <PIN_PA7__D7>,
+ <PIN_PA8__NWE_NANDWE>,
+ <PIN_PA9__NCS3>,
+ <PIN_PA10__A21_NANDALE>,
+ <PIN_PA11__A22_NANDCLE>,
+ <PIN_PA12__NRD_NANDOE>,
+ <PIN_PA21__NANDRDY>;
+ bias-disable;
+ };
};
};
};
};
+
+&ebi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_nand0_default>;
+ status = "okay";
+
+ nand_controller: nand-controller {
+ status = "okay";
+
+ nand@3 {
+ reg = <0x3 0x0 0x800000>;
+ //atmel,rb = <0>;
+ nand-bus-width = <8>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
+ nand-on-flash-bbt;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ spl@0 {
+ label = "spl";
+ reg = <0x0 0x40000>;
+ };
+
+ ubi@40000 {
+ label = "UBI";
+ reg = <0x40000 0x0>;
+ };
+ };
+ };
+ };
+};
> (What I do here: SoC loads at91bootstrap from raw NAND at offset 0,
> at91bootstrap loads U-Boot from raw NAND at some offset like 0x20000,
> U-Boot (proper) loads everything else from UBI.)
From my experience that can cause significant headache starting after
5-6 years in use. That's what I try to avoid :)
Regards
Benedikt Spranger
