Add Starfive JH7110 Cadence USB driver and related PHY driver. So the codes can be used in visionfive2 and star64 7110 board.
The driver is almost the same with kernel driver. Test with Star64 JH7110 board USB 3.0 + USB 2.0 host. The code can work. - previous version v1: https://patchwork.ozlabs.org/project/uboot/cover/20240504150358.19600-1-minda.c...@starfivetech.com/ v2: https://patchwork.ozlabs.org/project/uboot/cover/20240704055014.55117-1-minda.c...@starfivetech.com/ v3: https://patchwork.ozlabs.org/project/uboot/cover/20240719013822.101374-1-minda.c...@starfivetech.com/ - patch description. patch1: Add set phy mode function in cdns3 core driver which is used by Starfive JH7110. patch2-3: USB and PCIe 2.0 (usb 3.0) PHY drivier patch4: Cadence USB wrapper driver. patch5: Add JH7110 USB default overcurrent pin. patch6-7 dts, config update. patch8: Add star64 spl dts fixup patch patch9: MAINTAINERS update - change: v4: - patch 2 Add usb split setting, default set USB 2.0 only. - patch 5 move to spl stage. - Add a new patch 8 for star64 board usb host, vbus pin setting and usb 3.0 v3: - patch 1 Move the added code to cdns3_drd_update_mode(). - patch 1-4 correct the code format.(follow Rogers's comments.) - patch 3 using regmap_field. v2: - patch 1 Move the added code to cdns3_core_init_role(). Must set PHY mode before calling cdns3 role start function. - patch 1-4 correct the code format.(follow Marek's comments.) - patch 2 Add set 125M clock in PHY init function. - Add new patch5. Minda Chen (9): usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode() phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver usb: cdns: starfive: Add cdns USB driver spl: starfive: visionfive2: Disable USB overcurrent pin by default. configs: starfive: Add visionfive2 cadence USB configuration dts: starfive: Add JH7110 Cadence USB dts node spl: starfive: star64: Setup USB fdt fixup function MAINTAINERS: Update Starfive visionfive2 maintain files. .../dts/jh7110-starfive-visionfive-2.dtsi | 5 + arch/riscv/dts/jh7110.dtsi | 53 ++++ arch/riscv/include/asm/arch-jh7110/gpio.h | 5 + board/starfive/visionfive2/MAINTAINERS | 2 + board/starfive/visionfive2/spl.c | 69 +++++ configs/starfive_visionfive2_defconfig | 9 + drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/starfive/Kconfig | 21 ++ drivers/phy/starfive/Makefile | 7 + drivers/phy/starfive/phy-jh7110-pcie.c | 237 ++++++++++++++++++ drivers/phy/starfive/phy-jh7110-usb2.c | 166 ++++++++++++ drivers/usb/cdns3/Kconfig | 7 + drivers/usb/cdns3/Makefile | 2 + drivers/usb/cdns3/cdns3-starfive.c | 191 ++++++++++++++ drivers/usb/cdns3/drd.c | 14 ++ 16 files changed, 790 insertions(+) create mode 100644 drivers/phy/starfive/Kconfig create mode 100644 drivers/phy/starfive/Makefile create mode 100644 drivers/phy/starfive/phy-jh7110-pcie.c create mode 100644 drivers/phy/starfive/phy-jh7110-usb2.c create mode 100644 drivers/usb/cdns3/cdns3-starfive.c base-commit: ee2af844ba1b27b2e959c4e649e4b769fbeb4074 -- 2.17.1
