Dear Tom,
Please pull the SoCFPGA changes for next from u-boot-socfpga, containing:
1. A new driver in the misc to register setting from device tree. This also
provides user a clean interface and all register
settings are centralized in one place, device tree.
1. Enable Agilex5 platform for Intel product. Changes, modification and new
files are created for board, dts, configs and
makefile to create the base for Agilex5.
Build-tested on SoC64 boards, boot tested on some of them.
Best regards,
Tien Fong
The following changes since commit 86fd291a7990af84e96808f48eff2219dd4ef496:
Merge tag 'efi-2024-04-rc5' of
https://source.denx.de/u-boot/custodians/u-boot-efi (2024-03-13 20:39:46 -0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-socfpga.git
tags/u-boot-socfpga-next-20240319
for you to fetch changes up to 386fca68960994ece0d9da8a69a14495b5f1aedf:
arch: arm: Agilex5 enablement (2024-03-18 14:45:47 +0800)
----------------------------------------------------------------
Jit Loon Lim (1):
arch: arm: Agilex5 enablement
Wan Yee Lau (1):
drivers: misc: Add socfpga_dtreg driver for Intel SoCFPGA
arch/arm/Kconfig | 6 +-
arch/arm/dts/Makefile | 1 +
arch/arm/dts/socfpga_agilex5-u-boot.dtsi | 71 +++
arch/arm/dts/socfpga_agilex5.dtsi | 575
++++++++++++++++++++++
arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 124 +++++
arch/arm/dts/socfpga_agilex5_socdk.dts | 163 +++++++
arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi | 38 +-
arch/arm/mach-socfpga/Kconfig | 19 +-
arch/arm/mach-socfpga/Makefile | 14 +-
arch/arm/mach-socfpga/board.c | 56 ++-
arch/arm/mach-socfpga/clock_manager_agilex5.c | 89 ++++
arch/arm/mach-socfpga/include/mach/base_addr_soc64.h | 38 +-
arch/arm/mach-socfpga/include/mach/clock_manager.h | 4 +-
arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h | 12 +
arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 25 +-
arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 1 +
arch/arm/mach-socfpga/mmu-arm64_s10.c | 59 ++-
arch/arm/mach-socfpga/wrap_handoff_soc64.c | 1 -
board/intel/agilex5-socdk/MAINTAINERS | 8 +
configs/socfpga_agilex5_defconfig | 116 +++++
doc/device-tree-bindings/misc/socfpga_dtreg.txt | 80 ++++
drivers/clk/altera/Makefile | 1 +
drivers/clk/altera/clk-agilex5.c | 745
+++++++++++++++++++++++++++++
drivers/clk/altera/clk-agilex5.h | 284 +++++++++++
drivers/misc/Kconfig | 7 +
drivers/misc/Makefile | 1 +
drivers/misc/socfpga_dtreg.c | 115 +++++
include/configs/socfpga_agilex5_socdk.h | 12 +
include/configs/socfpga_soc64_common.h | 143 +++++-
include/dt-bindings/clock/agilex5-clock.h | 71 +++
include/dt-bindings/reset/altr,rst-mgr-agx5.h | 80 ++++
31 files changed, 2922 insertions(+), 37 deletions(-)
create mode 100644 arch/arm/dts/socfpga_agilex5-u-boot.dtsi
create mode 100644 arch/arm/dts/socfpga_agilex5.dtsi
create mode 100644 arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
create mode 100644 arch/arm/dts/socfpga_agilex5_socdk.dts
create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex5.c
create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h
create mode 100644 board/intel/agilex5-socdk/MAINTAINERS
create mode 100644 configs/socfpga_agilex5_defconfig
create mode 100644 doc/device-tree-bindings/misc/socfpga_dtreg.txt
create mode 100644 drivers/clk/altera/clk-agilex5.c
create mode 100644 drivers/clk/altera/clk-agilex5.h
create mode 100644 drivers/misc/socfpga_dtreg.c
create mode 100644 include/configs/socfpga_agilex5_socdk.h
create mode 100644 include/dt-bindings/clock/agilex5-clock.h
create mode 100644 include/dt-bindings/reset/altr,rst-mgr-agx5.h
