From: Lukas Funke <lukas.fu...@weidmueller.com>
Some zynqmp SoCs (the cg series) only have two cpus. Thus, for some
cases the cpu-affinity has to adapted, because cpu3 and cpu4 are
missing. By adding a label to the pmu fwnode the cpu affinity can
be adapted in a device specific dt.
Signed-off-by: Lukas Funke <lukas.fu...@weidmueller.com>
---
arch/arm/dts/zynqmp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index b50b83b772..457f8e394f 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -168,7 +168,7 @@
bootph-all;
};
- pmu {
+ pmu: pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
--
2.39.2
