Hi Kever, On 2023-10-08 11:09, Kever Yang wrote: > > On 2023/10/8 05:25, John Clark wrote: >> NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec. >> >> There are four variants depending on the DRAM size: 4G/32GB eMMC, 8G/64GB >> eMMC, >> 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR > > So the board is using SPI NOR flash. > > > [...] > >> diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c >> b/arch/arm/mach-rockchip/rk3588/rk3588.c >> index b1f535fad5..e08ebfa39b 100644 >> --- a/arch/arm/mach-rockchip/rk3588/rk3588.c >> +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c >> @@ -40,6 +40,7 @@ DECLARE_GLOBAL_DATA_PTR; >> const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { >> [BROM_BOOTSOURCE_EMMC] = "/mmc@fe2e0000", >> [BROM_BOOTSOURCE_SPINOR] = "/spi@fe2b0000/flash@0", >> + [BROM_BOOTSOURCE_SPINAND] = "/spi@fe2b0000/flash@0", > > Why need a SPI NAND? > > If this is really needed, will be a separate patch to support a new boot > source from bootrom.
I have done spi boot testing on a few rk3588 boards with SPI NOR flash, and there seem to be a correlation between the bootsource/bootdevice id written to reg by the bootrom and the fspi iomux used by the board. Following bootsource/bootdevice value can be read from reg, - FSPI (M0): 3 - FSPI (M1): 4 - FSPI (M2): 6 based on testing on the following boards: - Radxa ROCK 5 Model A - fspim0_pins - rk3588s - Xunlong Orange Pi 5 - fspim0_pins - rk3588s brom_bootdevice_id: 3 - FriendlyElec NanoPC-T6 - fspim1_pins - rk3588 - Xunlong Orange Pi 5 Plus - fspim1_pins - rk3588 brom_bootdevice_id: 4 - Radxa ROCK 5 Model B - fspim2_pins - rk3588 brom_bootdevice_id: 6 Can these observations be correct? And if so, maybe we should use following constants for RK3588? BROM_BOOTSOURCE_FSPI_M0 = 3 BROM_BOOTSOURCE_FSPI_M1 = 4 BROM_BOOTSOURCE_FSPI_M2 = 6 Any insights into what values bootrom will write to reg would be very helpful. Regards, Jonas > > > Thanks, > - Kever >