In commit fd6e425, Jonas finds the rock-5b device has a value of 6 at
CFG_IRAM_BASE + 0x10 (0xff000010) when booted from spi and creates the
BROM_BOOTSOURCE_SPINOR_RK3588 enum value.
https://github.com/u-boot/u-boot/commit/fd6e425be243dce518a02710482514faccf3c211
When I boot the nanopv-t6 from spi, I am seeing a value of 4 at 0xff000010.
We both should be expecting a value of 3:
BROM_BOOTSOURCE_SPINOR = 3, => 0x0000 0011 pre-RK3588 variants
BROM_BOOTSOURCE_SPINAND = 4, => 0x0000 0100 NanoPC-T6
BROM_BOOTSOURCE_SPINOR_RK3588 = 6, => 0x0000 0110 Rock-5b
Since this is the only use of CFG_IRAM_BASE, I have to wonder if 0xff000000
is correct for the RK3588?
I have included the relevant code below for convenience:
/**
* Boot-device identifiers as used by the BROM
*/
enum {
BROM_BOOTSOURCE_NAND = 1,
BROM_BOOTSOURCE_EMMC = 2,
BROM_BOOTSOURCE_SPINOR = 3,
BROM_BOOTSOURCE_SPINAND = 4,
BROM_BOOTSOURCE_SD = 5,
BROM_BOOTSOURCE_SPINOR_RK3588 = 6,
BROM_BOOTSOURCE_USB = 10,
BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
};
extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
/**
* Locations of the boot-device identifier in SRAM
*/
#define BROM_BOOTSOURCE_ID_ADDR (CFG_IRAM_BASE + 0x10)
https://github.com/u-boot/u-boot/blob/master/arch/arm/include/asm/arch-rockchip/bootrom.h
./include/configs/rk3128_common.h:#define CFG_IRAM_BASE 0x10080000
./include/configs/px30_common.h:#define CFG_IRAM_BASE 0xff0e0000
./include/configs/rk3188_common.h:#define CFG_IRAM_BASE 0x10080000
./include/configs/rk3568_common.h:#define CFG_IRAM_BASE 0xfdcc0000
./include/configs/rk3399_common.h:#define CFG_IRAM_BASE 0xff8c0000
./include/configs/rk3066_common.h:#define CFG_IRAM_BASE 0x10080000
./include/configs/rk3308_common.h:#define CFG_IRAM_BASE 0xfff80000
./include/configs/rk3368_common.h:#define CFG_IRAM_BASE 0xff8c0000
./include/configs/rk3288_common.h:#define CFG_IRAM_BASE 0xff700000
./include/configs/rk3328_common.h:#define CFG_IRAM_BASE 0xff090000
./include/configs/rv1108_common.h:#define CFG_IRAM_BASE 0x10080000
./include/configs/rk3588_common.h:#define CFG_IRAM_BASE 0xff000000
./include/configs/rk322x_common.h:#define CFG_IRAM_BASE 0x10080000
./include/configs/rv1126_common.h:#define CFG_IRAM_BASE 0xff700000
On Sun, Oct 8, 2023 at 5:09 AM Kever Yang <kever.y...@rock-chips.com> wrote:
>
> On 2023/10/8 05:25, John Clark wrote:
> > NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec.
> >
> > There are four variants depending on the DRAM size: 4G/32GB eMMC,
> 8G/64GB eMMC,
> > 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR
>
> So the board is using SPI NOR flash.
>
>
> [...]
>
> > diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c
> b/arch/arm/mach-rockchip/rk3588/rk3588.c
> > index b1f535fad5..e08ebfa39b 100644
> > --- a/arch/arm/mach-rockchip/rk3588/rk3588.c
> > +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
> > @@ -40,6 +40,7 @@ DECLARE_GLOBAL_DATA_PTR;
> > const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
> > [BROM_BOOTSOURCE_EMMC] = "/mmc@fe2e0000",
> > [BROM_BOOTSOURCE_SPINOR] = "/spi@fe2b0000/flash@0",
> > + [BROM_BOOTSOURCE_SPINAND] = "/spi@fe2b0000/flash@0",
>
> Why need a SPI NAND?
>
> If this is really needed, will be a separate patch to support a new boot
> source from bootrom.
>
>
> Thanks,
> - Kever
>
>
