Re: [PATCH v1 6/8] a1: clk: Add missing CLKID_USB_PHY_IN gate

[neil . armstrong]

On 02/10/2023 18:58, Alexey Romanov wrote:

From: Igor Prusov <ivpru...@salutedevices.com>

We use this clock in dwc3 driver.

Signed-off-by: Igor Prusov <ivpru...@salutedevices.com>
---
  drivers/clk/meson/a1.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c
index 3aec42f33b..1540e1875b 100644
--- a/drivers/clk/meson/a1.c
+++ b/drivers/clk/meson/a1.c
@@ -238,6 +238,9 @@ static const struct meson_clk_info *meson_clocks[] = {
        [CLKID_FIXPLL_IN] = CLK_GATE("fixpll_in", A1_SYS_OSCIN_CTRL, 1,
                EXTERNAL_XTAL
        ),
+       [CLKID_USB_PHY_IN] = CLK_GATE("usb_phy_in", A1_SYS_OSCIN_CTRL, 2,
+               EXTERNAL_XTAL
+       ),
        [CLKID_SARADC] = CLK_GATE("saradc", A1_SAR_ADC_CLK_CTR, 8,
                -ENOENT
        ),

Reviewed-by: Neil Armstrong <neil.armstr...@linaro.org>