On Thu, 3 Aug 2023 at 09:22, <lukas.funke-...@weidmueller.com> wrote: > > From: Lukas Funke <lukas.fu...@weidmueller.com> > > Add the Xilinx Bootgen as bintool. Xilinx Bootgen is used to create > bootable SPL (FSBL in Xilinx terms) images for Zynq/ZynqMP devices. The > btool creates a signed version of the SPL. Additionally to signing the > key source for the decryption engine can be passend to the boot image. > > Signed-off-by: Lukas Funke <lukas.fu...@weidmueller.com> > > --- > > Changes in v4: > - Fixed some typos > > Changes in v3: > - Fixed an issue where the build result was not found > - Fixed an issue where the version string was not reported correctly > > Changes in v2: > - Pass additional 'keysrc_enc' parameter to Bootgen > - Added more information and terms to documentation > > tools/binman/bintools.rst | 2 +- > tools/binman/btool/bootgen.py | 137 ++++++++++++++++++++++++++++++++++ > 2 files changed, 138 insertions(+), 1 deletion(-) > create mode 100644 tools/binman/btool/bootgen.py >
Reviewed-by: Simon Glass <s...@chromium.org> Applied to u-boot-dm, thanks!
