SPL load FIT images by reading the data aligned to block length.
Block length aligned image data is read directly to the load address.
Unaligned image data is written to an offset of the load address and
then the data is memcpy to the load address.
This adds a small overhead of having to memcpy unaligned data, something
that normally is not an issue.
However, TF-A may have a segment that should be loaded into SRAM, e.g.
vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the
8KiB PMU SRAM. Having the image data for such segment unaligned result
in segment being written to and memcpy from beyond the SRAM boundary, in
the end this results in invalid data in SRAM.
Aligning the FIT and its external data to MMC block length to work
around such issue.
Signed-off-by: Jonas Karlman <jo...@kwiboo.se>
Reviewed-by: Simon Glass <s...@chromium.org>
---
v2:
- Collect r-b tag
arch/arm/dts/rockchip-u-boot.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
b/arch/arm/dts/rockchip-u-boot.dtsi
index 234fc5df4332..63c8da456b4f 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -37,6 +37,7 @@
fit,fdt-list = "of-list";
filename = "u-boot.itb";
fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+ fit,align = <512>;
offset = <CONFIG_SPL_PAD_TO>;
images {
u-boot {
--
2.39.1
