Hi Ioana,

On 09.11.22 11:48, Ioana Ciornei wrote:
From: Stefan Roese <s...@denx.de>
Subject: LX2106A U-Boot: board_eth_init() not called any more

Dear NXP LX2160 developers!


Hi!

With commit 94633c36f9eb ("net: Make DM_ETH be selected by NETDEVICE")
DM_ETH is now mandatory. And net/eth_legacy.c is not compiled anymore.
Resulting in board_eth_init() not being called anymore. On NXP LX2160
platforms (and some other NXP platforms as well), this functions and
the legacy net/eth infrastructure seems still to be used AFAICT.

So could you please let me know, if and how ethernet support on these
boards is supposed to work with recent U-Boot versions on LX2160? My
understanding is, that the current versions will result in an output
like this:

...
In:    serial_pl01x
Out:   serial_pl01x
Err:   serial_pl01x
SEC0:  RNG instantiated
Net:   No ethernet found.
...

Or did I miss something?


I am not exactly sure what you missed but ethernet support under DM_ETH
for the DPAA2 based boards was added more than 2 years ago in the
upstream.

For example, the LX2160ARDB board does no longer rely on the
board_eth_init() function but rather it discovers its ethernet
interfaces, any connected PHY etc using the DTS file (just like Linux
does).

There are multiple patch sets that I submitted which made this support
available. For reference, I will list below just some patches which
added DM_ETH support for LX2160ARDB.
      8d3495023880 ("arm: dts: lx2160a: add external MDIO nodes")
      f660f7af1dcb ("arm: dts: lx2160ardb: add DPMAC and PHY nodes")
      643f5b47ec06 ("configs: lx2160ardb: enable CONFIG_DM_ETH and related")

Thanks for getting back to me. Yes, I completely missed this, as I
was only looking at board_eth_init() and using the LX2160 board with
DM_ETH disabled, which now is not supported any more.

And to double check, I just booted a LX2160ARDB board
(lx2160ardb_tfa_defconfig) with the latest u-boot from upstream and from
the log below you can see that the DPAA2 ethernet interfaces are
available.

U-Boot 2023.01-rc1-00019-g77b5cc2948f5 (Nov 09 2022 - 11:25:19 +0200)

SoC:  LX2160ACE Rev2.0 (0x87360020)
Clock Configuration:
        CPU0(A72):2200 MHz  CPU1(A72):2200 MHz  CPU2(A72):2200 MHz
        CPU3(A72):2200 MHz  CPU4(A72):2200 MHz  CPU5(A72):2200 MHz
        CPU6(A72):2200 MHz  CPU7(A72):2200 MHz  CPU8(A72):2200 MHz
        CPU9(A72):2200 MHz  CPU10(A72):2200 MHz  CPU11(A72):2200 MHz
        CPU12(A72):2200 MHz  CPU13(A72):2200 MHz  CPU14(A72):2200 MHz
        CPU15(A72):2200 MHz
        Bus:      750  MHz  DDR:      3200 MT/s
Reset Configuration Word (RCW):
        00000000: 5883833c 24580058 00000000 00000000
        00000010: 00000000 0c010000 00000000 00000000
        00000020: 036001a0 00002580 00000000 00000096
        00000030: 00000000 00000000 00000000 00000000
        00000040: 00000000 00000000 00000000 00000000
        00000050: 00000000 00000000 00000000 00000000
        00000060: 00000000 00000000 00027000 00000000
        00000070: 08b30010 00150020
Model: NXP Layerscape LX2160ARDB Board
Board: LX2160ACE Rev2.0-RDB, Board version: B, boot from FlexSPI DEV#1
FPGA: v4.0
SERDES1 Reference: Clock1 = 161.13MHz Clock2 = 161.13MHz
SERDES2 Reference: Clock1 = 100MHz Clock2 = 100MHz
SERDES3 Reference: Clock1 = 100MHz Clock2 = 100MHz
(...)
EEPROM: NXID v1
In:    serial_pl01x
Out:   serial_pl01x
Err:   serial_pl01x
SEC0:  RNG instantiated
Net:   e1000: 68:05:ca:57:cc:c8

Warning: e1000#0 MAC addresses don't match:
Address in ROM is               68:05:ca:57:cc:c8
Address in environment is       00:04:9f:05:c4:27
eth0: DPMAC3@usxgmii, eth1: DPMAC4@usxgmii, eth2: DPMAC17@rgmii-id, eth3: 
DPMAC18@rgmii-id, eth4: e1000#0 [PRIME]
SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 
64 MiB
device 0 offset 0x640000, size 0x80000
SF: 524288 bytes @ 0x640000 Read: OK
device 0 offset 0xf00000, size 0x100000
SF: 1048576 bytes @ 0xf00000 Read: OK
device 0 offset 0xa00000, size 0x300000
SF: 3145728 bytes @ 0xa00000 Read: OK
device 0 offset 0xe00000, size 0x100000
SF: 1048576 bytes @ 0xe00000 Read: OK
crc32+ MC firmware version 10.24.0

fsl-mc: Booting Management Complex ... SUCCESS
fsl-mc: Management Complex booted (version: 10.24.0, boot status: 0x1)
Hit any key to stop autoboot:  0
=> setenv ethact DPMAC3@usxgmii
=> setenv ipaddr 10.0.0.1
=> ping 10.0.0.2
DPMAC3@usxgmii Waiting for PHY auto negotiation to complete.Using 
DPMAC3@usxgmii device
host 10.0.0.2 is alive

Great. Many thanks for this testing this. I need to check what needs to
be done on our custom LX2160 based board in the dts/dtsi files and
corresponding drivers to fully support operation with DM_ETH enabled
now.

BTW: You might want to send a patch removing the now obsolete
board_eth_init() functions in board/freescale/*.

Thanks,
Stefan

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