On 26/10/2022 08:49, Conor Dooley wrote:
> A late ack is currently being sent at the end of a transfer due to
> incorrect logic in mchp_corei2c_empty_rx(). Currently the Assert Ack
> bit is being written to the controller's control reg after the last
> byte has been received, causing it to sent another byte with the ack.
> Instead, the AA flag should be written to the control register when
> the penultimate byte is read so it is sent out for the last byte.
>
> Reported-by: Andreas Buerkler <andreas.buerk...@enclustra.com>
> Fixes: 0dc0d1e094 ("i2c: Add Microchip PolarFire SoC I2C driver")
> Fixes: 0190d48488 ("i2c: microchip: fix ack sending logic")
I had removed this fixes tag but I must have aborted the rebase
in which I did. If nothing else needs changing, please drop it,
otherwise I'll remove it if/when I send a v2.
Thanks,
Conor.
> Signed-off-by: Conor Dooley <conor.doo...@microchip.com>
> ---
> drivers/i2c/i2c-microchip.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/i2c-microchip.c b/drivers/i2c/i2c-microchip.c
> index 3a27459386..d82b80f535 100644
> --- a/drivers/i2c/i2c-microchip.c
> +++ b/drivers/i2c/i2c-microchip.c
> @@ -224,7 +224,7 @@ static void mpfs_i2c_empty_rx(struct mpfs_i2c_bus *bus)
> bus->msg_len--;
> }
>
> - if (bus->msg_len == 0) {
> + if (bus->msg_len <= 1) {
> ctrl = readl(bus->base + MPFS_I2C_CTRL);
> ctrl &= ~CTRL_AA;
> writel(ctrl, bus->base + MPFS_I2C_CTRL);
