[[PATCH 7/7] powerpc/86xx: Convert SBC8641 to use common SRIO init code] On
06/01/2011 (Thu 10:58) Kumar Gala wrote:
> Signed-off-by: Kumar Gala <ga...@kernel.crashing.org>
> CC: Paul Gortmaker <paul.gortma...@windriver.com>
Tested in conjuntion with the mpc85xx dev branch and Peter's patch.
For some reason flash erase doesn't work, but I'm guessing that is a
completely unrelated regression that I'll need to track down.
Tested-by: Paul Gortmaker <paul.gortma...@windriver.com>
P.
> ---
> board/sbc8641d/law.c | 1 -
> include/configs/sbc8641d.h | 15 +++++++++------
> 2 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c
> index a6f60ee..14259d6 100644
> --- a/board/sbc8641d/law.c
> +++ b/board/sbc8641d/law.c
> @@ -51,7 +51,6 @@ struct law_entry law_table[] = {
> #endif
> SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
> SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC),
> - SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO)
> };
>
> int num_law_entries = ARRAY_SIZE(law_table);
> diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
> index 90d84eb..f425150 100644
> --- a/include/configs/sbc8641d.h
> +++ b/include/configs/sbc8641d.h
> @@ -57,6 +57,9 @@
> */
> #define CONFIG_SYS_SCRATCH_VA 0xe8000000
>
> +#define CONFIG_SYS_HAS_SRIO
> +#define CONFIG_SRIO1 /* SRIO port 1 */
> +
> #define CONFIG_PCI 1 /* Enable PCIE */
> #define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
> #define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
> @@ -297,9 +300,9 @@
> /*
> * RapidIO MMU
> */
> -#define CONFIG_SYS_RIO_MEM_BASE 0xc0000000 /* base address */
> -#define CONFIG_SYS_RIO_MEM_PHYS CONFIG_SYS_RIO_MEM_BASE
> -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */
> +#define CONFIG_SYS_SRIO1_MEM_BASE 0xc0000000 /* base address */
> +#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BASE
> +#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 128M */
>
> /*
> * General PCI
> @@ -417,10 +420,10 @@
> * BAT2 512M Cache-inhibited, guarded
> * 0xc000_0000 512M RapidIO Memory
> */
> -#define CONFIG_SYS_DBAT2L (CONFIG_SYS_RIO_MEM_BASE | BATL_PP_RW \
> +#define CONFIG_SYS_DBAT2L (CONFIG_SYS_SRIO1_MEM_BASE | BATL_PP_RW \
> | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
> -#define CONFIG_SYS_DBAT2U (CONFIG_SYS_RIO_MEM_BASE | BATU_BL_512M |
> BATU_VS | BATU_VP)
> -#define CONFIG_SYS_IBAT2L (CONFIG_SYS_RIO_MEM_BASE | BATL_PP_RW |
> BATL_CACHEINHIBIT)
> +#define CONFIG_SYS_DBAT2U (CONFIG_SYS_SRIO1_MEM_BASE | BATU_BL_512M |
> BATU_VS | BATU_VP)
> +#define CONFIG_SYS_IBAT2L (CONFIG_SYS_SRIO1_MEM_BASE | BATL_PP_RW |
> BATL_CACHEINHIBIT)
> #define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U
>
> /*
> --
> 1.7.2.3
>
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