Sorry about that! I ran get_maintainer.pl on my patchset and got your name along with several others so I also sent to you.
On Fri, Sep 16, 2022 at 2:38 PM Pali Rohár <p...@kernel.org> wrote: > > Hello! I'm not riscv maintainer and therefore I'm not going to review > this patch series. Please do not spam me with unrelated emails and > patches as I would loose track of patches and emails which are import > and which I should review. Thanks. > > On Friday 16 September 2022 13:42:30 Kautuk Consul wrote: > > Semihosting is a mechanism that enables code running on > > a target to communicate and use the Input/Output > > facilities on a host computer that is running a debugger. > > This patchset adds support for semihosting in u-boot > > for RISCV64 targets. > > > > CHANGES since v1: > > - Moved the identical smh_* and semihosting_enabled/disable_semihosting > > code of ARM and RISC-V to lib/semihosting.c > > - Extend the handle_trap() functionality to call disable_semihosting() > > if the cause is a breakpoint (i.e. ebreak instruction) > > - Change our implementation of semihosting_enabled to be exactly the > > same as the way ARM implemented it > > - Additionally enable the CONFIG_SPL_FS_EXT4 and CONFIG_SPL_FS_FAT > > configs for qemu defconfigs so that CONFIG_SPL_FS_LOAD_PAYLOAD_NAME > > gets automatically enabled instead of us #defining it in > > include/configs/qemu-riscv.h > > > > Compilation and test commands for SPL and S-mode configurations > > ================================================================= > > > > U-Boot S-mode on QEMU virt > > ---------------------------- > > // Compilation of S-mode u-boot > > ARCH=riscv > > CROSS_COMPILE=riscv64-unknown-linux-gnu- > > make qemu-riscv64_smode_defconfig > > make > > // Run riscv 64-bit u-boot with opensbi on qemu > > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\ > > opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\ > > u-boot/u-boot.bin > > > > U-Boot SPL on QEMU virt > > ------------------------ > > // Compilation of u-boot-spl > > ARCH=riscv > > CROSS_COMPILE=riscv64-unknown-linux-gnu- > > make qemu-riscv64_spl_defconfig > > make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin > > // Run 64-bit u-boot-spl in qemu > > qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\ > > u-boot/spl/u-boot-spl.bin -device\ > > loader,file=u-boot/u-boot.itb,addr=0x80200000 > > > > Kautuk Consul (3): > > lib: Add common semihosting library > > arch/riscv: add semihosting support for RISC-V > > board: qemu-riscv: enable semihosting > > > > arch/arm/Kconfig | 2 + > > arch/arm/lib/semihosting.c | 179 +------------------------- > > arch/riscv/Kconfig | 47 +++++++ > > arch/riscv/include/asm/semihosting.h | 11 ++ > > arch/riscv/include/asm/spl.h | 1 + > > arch/riscv/lib/Makefile | 2 + > > arch/riscv/lib/interrupts.c | 11 ++ > > arch/riscv/lib/semihosting.c | 24 ++++ > > configs/qemu-riscv32_defconfig | 4 + > > configs/qemu-riscv32_smode_defconfig | 4 + > > configs/qemu-riscv32_spl_defconfig | 7 + > > configs/qemu-riscv64_defconfig | 4 + > > configs/qemu-riscv64_smode_defconfig | 4 + > > configs/qemu-riscv64_spl_defconfig | 7 + > > include/semihosting.h | 11 ++ > > lib/Kconfig | 3 + > > lib/Makefile | 2 + > > lib/semihosting.c | 186 +++++++++++++++++++++++++++ > > 18 files changed, 331 insertions(+), 178 deletions(-) > > create mode 100644 arch/riscv/include/asm/semihosting.h > > create mode 100644 arch/riscv/lib/semihosting.c > > create mode 100644 lib/semihosting.c > > > > -- > > 2.34.1 > >
