Hello Michal,
On Wed, Jul 13, 2022 at 03:20:44PM +0200, Alexander Dahl wrote:
> Hello Michal,
>
> On Wed, Jul 13, 2022 at 02:56:08PM +0200, Michal Simek wrote:
> >
> >
> > On 7/13/22 14:32, Alexander Dahl wrote:
> > > From: Alexander Dahl <a...@thorsis.com>
> > >
> > > After commit 8cca60a2cbf2 ("Kconfig: Remove some symbols from the
> > > whitelist") downstream builds failed for boards setting this in
> > > include/configs/…
> > >
> > > Two FPGA drivers consider this definition.
> >
> > 2?
> > board/astro/mcf5373l/fpga.c
> > drivers/fpga/ACEX1K.c
> > drivers/fpga/virtex2.c
>
> These are one board and two drivers. What is your question?
>
> Greets
> AlexI'm sorry, this was misleading. I added some more comments below and forgot to remove this line indicating end of message. Considering your answer I guess you stopped reading here? > > > > > > > > > Signed-off-by: Alexander Dahl <a...@thorsis.com> > > > --- > > > README | 3 --- > > > drivers/fpga/Kconfig | 4 ++++ > > > 2 files changed, 4 insertions(+), 3 deletions(-) > > > > > > diff --git a/README b/README > > > index ff0df3797d..8c31e5c0e3 100644 > > > --- a/README > > > +++ b/README > > > @@ -1346,9 +1346,6 @@ The following options need to be configured: > > > If defined, a function that provides delays in the FPGA > > > configuration driver. > > > - CONFIG_SYS_FPGA_CHECK_CTRLC > > > - Allow Control-C to interrupt FPGA configuration > > > - > > > CONFIG_SYS_FPGA_CHECK_ERROR > > > Check for configuration errors during FPGA bitfile > > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > > > index 76719517f5..53d91676e0 100644 > > > --- a/drivers/fpga/Kconfig > > > +++ b/drivers/fpga/Kconfig > > > @@ -91,4 +91,8 @@ config FPGA_ZYNQPL > > > Enable FPGA driver for loading bitstream in BIT and BIN format > > > on Xilinx Zynq devices. > > > +config SYS_FPGA_CHECK_CTRLC > > > + bool "Allow Control-C to interrupt FPGA configuration" > > > + depends on FPGA > > > > Please write help message. > > Okay, I'll have to invent a new message here, if the prompt is not > self explaining enough. Since this is not conversion, but adding a > new message we did not have before, should this go into a separate > patch? > > > > > > + > > > endmenu > > > > > > And can you please remove this code from drivers/fpga/virtex2.c > > > > 48 /* > > 49 * Don't allow config cycle to be interrupted > > 50 */ > > 51 #ifndef CONFIG_SYS_FPGA_CHECK_CTRLC > > 52 #undef CONFIG_SYS_FPGA_CHECK_CTRLC > > 53 #endif > > > > it doesn't make any sense. > > I have no hardware to test this and this is out of scope of the > conversion patch itself. > > > > > And with 2/2 please also remove > > drivers/fpga/spartan2.c:18:#undef CONFIG_SYS_FPGA_PROG_FEEDBACK > > drivers/fpga/virtex2.c:44:#ifndef CONFIG_SYS_FPGA_PROG_FEEDBACK > > drivers/fpga/virtex2.c:45:#define CONFIG_SYS_FPGA_PROG_FEEDBACK > > > > Thanks, > > Michal > > I may be able to add an additional patch or two, but those are all > FPGAs I have no experience with and I can not test those. This would > be more or less guessing based on code reading. I can try next week, > not able to do this currently. > > Thanks for your review. I'll look into all this next week again. Greets Alex > > Greets > Alex > > -- > /"\ ASCII RIBBON | »With the first link, the chain is forged. The first > \ / CAMPAIGN | speech censured, the first thought forbidden, the > X AGAINST | first freedom denied, chains us all irrevocably.« > / \ HTML MAIL | (Jean-Luc Picard, quoting Judge Aaron Satie) -- /"\ ASCII RIBBON | »With the first link, the chain is forged. The first \ / CAMPAIGN | speech censured, the first thought forbidden, the X AGAINST | first freedom denied, chains us all irrevocably.« / \ HTML MAIL | (Jean-Luc Picard, quoting Judge Aaron Satie)
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