On 1/20/22 09:41, Andy Chiu wrote:
From: Greentime Hu <greentime...@sifive.com>
If we just use fdtdec_get_addr_size_fixed to get "reg" it will use
64bit address cell to get the base address.
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible ="SiFive,FU500-soc", "fu500-soc", "sifive-soc", "simple-bus";
ranges;
L28: axidma@30010000 {
#dma-cells = <1>;
compatible = "xlnx,axi-dma-1.00.a";
axistream-connected = <&L27>;
axistream-control-connected = <&L27>;
clocks = <&L1>;
interrupt-parent = <&L6>;
interrupts = <32 33>;
reg = <0x30010000 0x4000>;
fdtdec_get_addr_size_fixed: reg: addr=3001000000004000
We should get the base address through its parent's address-cells and
size-cells settings. So we should use fdtdec_get_addr_size_auto_parent()
to get correct base address.
After applying this patch, we can get the correct base address of dma by
replacing fdtdec_get_addr_size_fixed() with
fdtdec_get_addr_size_auto_parent().
fdtdec_get_addr_size_auto_parent:
na=1, ns=1, fdtdec_get_addr_size_fixed: reg: addr=30010000
Signed-off-by: Greentime Hu <greentime...@sifive.com>
Signed-off-by: Andy Chiu <andy.c...@sifive.com>
---
drivers/net/xilinx_axi_emac.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 2ec76d0f52..f21addb4d0 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -832,8 +832,8 @@ static int axi_emac_of_to_plat(struct udevice *dev)
printf("%s: axistream is not found\n", __func__);
return -EINVAL;
}
- plat->dmatx = (struct axidma_reg *)fdtdec_get_addr(gd->fdt_blob,
- offset, "reg");
+ plat->dmatx = (struct axidma_reg *)fdtdec_get_addr_size_auto_parent
+ (gd->fdt_blob, 0, offset, "reg", 0, NULL, false);
if (!plat->dmatx) {
printf("%s: axi_dma register space not found\n", __func__);
return -EINVAL;
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
