RE: [PATCH 1/2] mmc: fsl_esdhc_imx: Fix fsl_esdhc_wait_dat0

[Bough Chen]

> -----Original Message-----
> From: Adam Ford [mailto:aford...@gmail.com]
> Sent: 2022年1月12日 21:54
> To: u-boot@lists.denx.de
> Cc: Peng Fan <peng....@nxp.com>; Bough Chen <haibo.c...@nxp.com>;
> andrey.zhizhi...@leica-geosystems.com; thar...@gateworks.com;
> este...@gmail.com; sba...@denx.de; af...@beaconembedded.com; Adam
> Ford <aford...@gmail.com>
> Subject: [PATCH 1/2] mmc: fsl_esdhc_imx: Fix fsl_esdhc_wait_dat0
> 
> According to Haibo Chen [1] - the current implementation mmc_wait_dat0,
the
> second mmc_wait_dat0() in mmc_switch_voltage() always return timeout.
> This causes UHS cards to not properly initialize to their highest rate,
and
> default back for high-speed mode.
> 
> When reviewing [1] and comparing it to the linux driver, it appears that
this
> function can be accomplished by turning off the clock, and waiting for the
> clock-standby bit to become active.
> 
> [1] -
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.de
> nx.de%2Fpipermail%2Fu-boot%2F2021-January%2F438644.html&amp;data=04
> %7C01%7Chaibo.chen%40nxp.com%7C5de948ddd6fb41a9ab2c08d9d5d304d9
> %7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63777592456049525
> 1%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiL
> CJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=QVXYNWR3t2N9oCr
> BZSnoJVquwWdJuvo0hmuP%2FZhZifc%3D&amp;reserved=0
> 
> Reported-by: Tim Harvey <thar...@gateworks.com>
> Signed-off-by: Adam Ford <aford...@gmail.com>
> 
> diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index
> 4c06361bee..e5814232a2 100644
> --- a/drivers/mmc/fsl_esdhc_imx.c
> +++ b/drivers/mmc/fsl_esdhc_imx.c
> @@ -1684,9 +1684,15 @@ static int fsl_esdhc_wait_dat0(struct udevice *dev,
> int state,
>       struct fsl_esdhc_priv *priv = dev_get_priv(dev);
>       struct fsl_esdhc *regs = priv->esdhc_regs;
> 
> +     /*
> +      * Clear the clock-enable and wait for the bit indicating it
> +      * is in standby.
> +      */
> +     esdhc_clrbits32(&regs->vendorspec, VENDORSPEC_CKEN);

Hi Adam,

For the usdhc on i.MX, the bit VENDORSPEC_CKEN is not implement by IP,
instead, we use the bit 8 of register 0xc0.

By the way, for the wait_dat0 function, it not only cover the IO voltage
switch process, other place also need this function. So I think this change
is not correct.

Best Regards
Haibo Chen

>       ret = readx_poll_timeout(esdhc_read32, &regs->prsstat, tmp,
> -                             !!(tmp & PRSSTAT_DAT0) == !!state,
> +                             (tmp & PRSSTAT_SDSTB),
>                               timeout_us);
> +
>       return ret;
>  }
> 
> --
> 2.32.0

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