The patch is to support getting FEC MAC address from fuse bank.
Signed-off-by: Jason Liu <r64...@freescale.com>
---
Changes for v2:
- correct the mac address byte order according to review comments
- add memset(edev, 0. sizeof(*edev)) when do fec_probe,
- fix some code comments
---
arch/arm/include/asm/arch-mx25/imx-regs.h | 10 +++-------
arch/arm/include/asm/arch-mx27/imx-regs.h | 5 ++---
arch/arm/include/asm/arch-mx5/imx-regs.h | 24 ++++++++++++++++++++++++
drivers/net/fec_mxc.c | 16 ++++++----------
4 files changed, 35 insertions(+), 20 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h
b/arch/arm/include/asm/arch-mx25/imx-regs.h
index f5a2929..6afcfdf 100644
--- a/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -128,12 +128,8 @@ struct iim_regs {
u32 iim_prev;
u32 iim_srev;
u32 iim_prog_p;
- u32 res1[0x1f5];
- u32 iim_bank_area0[0x20];
- u32 res2[0xe0];
- u32 iim_bank_area1[0x20];
- u32 res3[0xe0];
- u32 iim_bank_area2[0x20];
+ u32 res[0x1f5];
+ u32 iim_bank_area[0x100 * 3];
};
#endif
@@ -313,6 +309,6 @@ struct iim_regs {
#define WSR_UNLOCK2 0xAAAA
/* FUSE bank offsets */
-#define IIM0_MAC 0x1a
+#define IIM_MAC 0x1a
#endif /* _IMX_REGS_H */
diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h
b/arch/arm/include/asm/arch-mx27/imx-regs.h
index 6ecddaa..429f893 100644
--- a/arch/arm/include/asm/arch-mx27/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx27/imx-regs.h
@@ -202,8 +202,7 @@ struct iim_regs {
u32 iim_scs1;
u32 iim_scs2;
u32 iim_scs3;
- u32 res[0x1F0];
- u32 iim_bank_area0[0x100];
+ u32 iim_bank_area[0x100 * 2];
};
#endif
@@ -513,7 +512,7 @@ struct iim_regs {
#define IIM_ERR_PARITYE (1 << 1)
/* Definitions for i.MX27 TO2 */
-#define IIM0_MAC 5
+#define IIM_MAC 5
#define IIM0_SCC_KEY 11
#define IIM1_SUID 1
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h
b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 0b6249a..93eef48 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -205,6 +205,9 @@
#define BOARD_REV_1_0 0x0
#define BOARD_REV_2_0 0x1
+#define IMX_IIM_BASE (IIM_BASE_ADDR)
+#define IIM_MAC 0x109
+
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
#include <asm/types.h>
@@ -275,6 +278,27 @@ struct src {
u32 sisr;
u32 simr;
};
+
+struct iim_regs {
+ u32 stat;
+ u32 statm;
+ u32 err;
+ u32 emask;
+ u32 fctl;
+ u32 ua;
+ u32 la;
+ u32 sdat;
+ u32 prev;
+ u32 srev;
+ u32 preg_p;
+ u32 scs0;
+ u32 scs1;
+ u32 scs2;
+ u32 scs3;
+ u32 res[0x1f1];
+ u32 iim_bank_area[0x100 * 4];
+};
+
#endif /* __ASSEMBLER__*/
#endif /* __ASM_ARCH_MXC_MX51_H__ */
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 3f09c2b..1e6ba06 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -312,21 +312,16 @@ static void fec_rbd_clean(int last, struct fec_bd *pRbd)
static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac)
{
-/*
- * The MX27 can store the mac address in internal eeprom
- * This mechanism is not supported now by MX51 or MX25
- */
-#if defined(CONFIG_MX51) || defined(CONFIG_MX25)
- return -1;
-#else
struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
int i;
for (i = 0; i < 6; i++)
+#ifdef CONFIG_MX27
mac[6-1-i] = readl(&iim->iim_bank_area0[IIM0_MAC + i]);
-
- return !is_valid_ether_addr(mac);
+#else
+ mac[i] = readl(&iim->iim_bank_area[IIM_MAC + i]);
#endif
+ return !is_valid_ether_addr(mac);
}
static int fec_set_hwaddr(struct eth_device *dev)
@@ -710,6 +705,7 @@ static int fec_probe(bd_t *bd)
puts("fec_mxc: not enough malloc memory\n");
return -ENOMEM;
}
+ memset(edev, 0, sizeof(*edev));
edev->priv = fec;
edev->init = fec_init;
edev->send = fec_send;
@@ -753,7 +749,7 @@ static int fec_probe(bd_t *bd)
eth_register(edev);
if (fec_get_hwaddr(edev, ethaddr) == 0) {
- printf("got MAC address from EEPROM: %pM\n", ethaddr);
+ printf("got MAC address from FUSE: %pM\n", ethaddr);
memcpy(edev->enetaddr, ethaddr, 6);
}
--
1.7.0.4
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