On Fri, 2021-09-03 at 12:33 +0530, Gaurav Jain wrote:
> added crypto node in device tree.
> sec is initialized based on job ring information processed
> from device tree.
>
> Signed-off-by: Gaurav Jain <gaurav.j...@nxp.com>
Reviewed-by: Ye Li <ye...@nxp.com>
Best regards,
Ye Li
> ---
> arch/arm/Kconfig | 2 +-
> arch/arm/dts/imx7ulp.dtsi | 24 ++++++++++++++++++++++++
> arch/arm/mach-imx/mx7ulp/Kconfig | 4 ++++
> arch/arm/mach-imx/mx7ulp/soc.c | 16 ++++++++++++++++
> 4 files changed, 45 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index addd349e54..b3d11c1a0d 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -848,7 +848,7 @@ config ARCH_MX7ULP
> bool "NXP MX7ULP"
> select CPU_V7A
> select GPIO_EXTRA_HEADER
> - select SYS_FSL_HAS_SEC if IMX_HAB
> + select SYS_FSL_HAS_SEC
> select SYS_FSL_SEC_COMPAT_4
> select SYS_FSL_SEC_LE
> select ROM_UNIFIED_SECTIONS
> diff --git a/arch/arm/dts/imx7ulp.dtsi b/arch/arm/dts/imx7ulp.dtsi
> index 7bcd2cc346..494b9d98b2 100644
> --- a/arch/arm/dts/imx7ulp.dtsi
> +++ b/arch/arm/dts/imx7ulp.dtsi
> @@ -1,5 +1,6 @@
> /*
> * Copyright 2015-2016 Freescale Semiconductor, Inc.
> + * Copyright 2021 NXP
> *
> * This program is free software; you can redistribute it and/or
> modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -198,6 +199,29 @@
> };
> };
>
> + crypto: crypto@40240000 {
> + compatible = "fsl,sec-v4.0";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x40240000 0x10000>;
> + ranges = <0 0x40240000 0x10000>;
> + clocks = <&clks IMX7ULP_CLK_CAAM>,
> + <&clks IMX7ULP_CLK_NIC1_BUS_DIV>;
> + clock-names = "aclk", "ipg";
> +
> + sec_jr0: jr@1000 {
> + compatible = "fsl,sec-v4.0-job-
> ring";
> + reg = <0x1000 0x1000>;
> + interrupts = <GIC_SPI 54
> IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + sec_jr1: jr@2000 {
> + compatible = "fsl,sec-v4.0-job-
> ring";
> + reg = <0x2000 0x1000>;
> + interrupts = <GIC_SPI 54
> IRQ_TYPE_LEVEL_HIGH>;
> + };
> + };
> +
> tpm5: tpm@40260000 {
> compatible = "fsl,imx7ulp-tpm";
> reg = <0x40260000 0x1000>;
> diff --git a/arch/arm/mach-imx/mx7ulp/Kconfig b/arch/arm/mach-
> imx/mx7ulp/Kconfig
> index 2ffac9cf7c..0d9f8ffed9 100644
> --- a/arch/arm/mach-imx/mx7ulp/Kconfig
> +++ b/arch/arm/mach-imx/mx7ulp/Kconfig
> @@ -25,6 +25,10 @@ config TARGET_MX7ULP_EVK
> bool "Support mx7ulp EVK board"
> select MX7ULP
> select SYS_ARCH_TIMER
> + select FSL_CAAM
> + select FSL_BLOB
> + select MISC
> + select ARCH_MISC_INIT
>
> endchoice
>
> diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-
> imx/mx7ulp/soc.c
> index 320f24dd29..1cfc751bdc 100644
> --- a/arch/arm/mach-imx/mx7ulp/soc.c
> +++ b/arch/arm/mach-imx/mx7ulp/soc.c
> @@ -1,6 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> * Copyright (C) 2016 Freescale Semiconductor, Inc.
> + * Copyright 2021 NXP
> */
>
> #include <common.h>
> @@ -14,6 +15,7 @@
> #include <asm/mach-imx/boot_mode.h>
> #include <asm/mach-imx/hab.h>
> #include <linux/bitops.h>
> +#include <dm.h>
>
> #define PMC0_BASE_ADDR 0x410a1000
> #define PMC0_CTRL 0x28
> @@ -79,6 +81,20 @@ int arch_cpu_init(void)
> return 0;
> }
>
> +#if defined(CONFIG_ARCH_MISC_INIT)
> +int arch_misc_init(void)
> +{
> + struct udevice *dev;
> + int ret;
> +
> + ret = uclass_get_device_by_driver(UCLASS_MISC,
> DM_DRIVER_GET(caam_jr), &dev);
> + if (ret)
> + printf("Failed to initialize %s: %d\n", dev->name,
> ret);
> +
> + return 0;
> +}
> +#endif
> +
> #ifdef CONFIG_BOARD_POSTCLK_INIT
> int board_postclk_init(void)
> {
