Dear Peter Tyser,
In message <1288298646.8967.130.ca...@petert> you wrote:
>
> So the original behavior of the TQM board was out of sync with the
> majority of other boards, and some boards have a newline.
Let's say a large number of board maintainers do not care about nice
formatting of the output.
So if we use common code for a certain set, please let's not use the
lowest common denominator.
> I agree we should get rid of the newline on all these printfs, but the
> indentation issue is murkier to me. The common Freescale PCI code
> currently assumes there is an indentation, so we should really sync
> boards'/FSL indentation up to be consistent. Anyone have a strong
> preference for the indentation? p2020 way, or socrates way above?
Why should the PCI output be indented? It is not so on any other board
I ever had my fingers on.
Example - all APM boards look like that:
CPU: AMCC PowerPC 460EX Rev. B at 1066.667 MHz (PLB=266 OPB=88 EBC=88)
Security/Kasumi support
Bootstrap Option H - Boot ROM Location I2C (Addr 0x52)
Internal PCI arbiter enabled
32 kB I-Cache 32 kB D-Cache
Board: Canyonlands - AMCC PPC460EX Evaluation Board, 1*PCIe/1*SATA, Rev. 16
I2C: ready
DRAM: 512 MiB (ECC not enabled, 533 MHz, CL4)
FLASH: 64 MiB
NAND: 128 MiB
PCI: Bus Dev VenId DevId Class Int
PCIE1: link is not up.
DTT: 1 is 27 C
Net: ppc_4xx_eth0, ppc_4xx_eth1
...
Output starts in the first column, all nicely aligned.
> > Scanning PCI bus 00
> > PCIE1 on bus 00 - 00
>
> I just sent a patch to address this issue.
Thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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